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Commit cbab95db authored by Francisco Jerez's avatar Francisco Jerez Committed by Ben Skeggs
Browse files

drm/nouveau: Some random cleanups. 



Remove some unused/duplicated definitions and make sparse happy again.

Signed-off-by: default avatarFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 5eb94fbb

drivers/gpu/drm/nouveau/nouveau_drv.h

+3 −38
Original line number Diff line number Diff line
@@ -485,13 +485,13 @@ enum nv04_fp_display_regs { 
};



struct nv04_crtc_reg {

	unsigned char MiscOutReg;     /* */

	unsigned char MiscOutReg;

	uint8_t CRTC[0xa0];

	uint8_t CR58[0x10];

	uint8_t Sequencer[5];

	uint8_t Graphics[9];

	uint8_t Attribute[21];

	unsigned char DAC[768];       /* Internal Colorlookuptable */

	unsigned char DAC[768];



	/* PCRTC regs */

	uint32_t fb_start;
@@ -539,43 +539,9 @@ struct nv04_output_reg { 
};



struct nv04_mode_state {

	uint32_t bpp;

	uint32_t width;

	uint32_t height;

	uint32_t interlace;

	uint32_t repaint0;

	uint32_t repaint1;

	uint32_t screen;

	uint32_t scale;

	uint32_t dither;

	uint32_t extra;

	uint32_t fifo;

	uint32_t pixel;

	uint32_t horiz;

	int arbitration0;

	int arbitration1;

	uint32_t pll;

	uint32_t pllB;

	uint32_t vpll;

	uint32_t vpll2;

	uint32_t vpllB;

	uint32_t vpll2B;

	struct nv04_crtc_reg crtc_reg[2];

	uint32_t pllsel;

	uint32_t sel_clk;

	uint32_t general;

	uint32_t crtcOwner;

	uint32_t head;

	uint32_t head2;

	uint32_t cursorConfig;

	uint32_t cursor0;

	uint32_t cursor1;

	uint32_t cursor2;

	uint32_t timingH;

	uint32_t timingV;

	uint32_t displayV;

	uint32_t crtcSync;



	struct nv04_crtc_reg crtc_reg[2];

};



enum nouveau_card_type {
@@ -1239,7 +1205,6 @@ extern u16 nouveau_bo_rd16(struct nouveau_bo *nvbo, unsigned index); 
extern void nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val);

extern u32 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index);

extern void nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val);

extern int nouveau_bo_sync_gpu(struct nouveau_bo *, struct nouveau_channel *);



/* nouveau_fence.c */

struct nouveau_fence;

drivers/gpu/drm/nouveau/nouveau_irq.c

+10 −9
Original line number Diff line number Diff line
@@ -209,8 +209,8 @@ nouveau_fifo_irq_handler(struct drm_device *dev) 
		}



		if (status & NV_PFIFO_INTR_DMA_PUSHER) {

			u32 get = nv_rd32(dev, 0x003244);

			u32 put = nv_rd32(dev, 0x003240);

			u32 dma_get = nv_rd32(dev, 0x003244);

			u32 dma_put = nv_rd32(dev, 0x003240);

			u32 push = nv_rd32(dev, 0x003220);

			u32 state = nv_rd32(dev, 0x003228);
@@ -224,13 +224,14 @@ nouveau_fifo_irq_handler(struct drm_device *dev) 
					NV_INFO(dev, "PFIFO_DMA_PUSHER - Ch %d Get 0x%02x%08x "

					     "Put 0x%02x%08x IbGet 0x%08x IbPut 0x%08x "

					     "State 0x%08x Push 0x%08x\n",

						chid, ho_get, get, ho_put, put,

						ib_get, ib_put, state, push);

						chid, ho_get, dma_get, ho_put,

						dma_put, ib_get, ib_put, state,

						push);



				/* METHOD_COUNT, in DMA_STATE on earlier chipsets */

				nv_wr32(dev, 0x003364, 0x00000000);

				if (get != put || ho_get != ho_put) {

					nv_wr32(dev, 0x003244, put);

				if (dma_get != dma_put || ho_get != ho_put) {

					nv_wr32(dev, 0x003244, dma_put);

					nv_wr32(dev, 0x003328, ho_put);

				} else

				if (ib_get != ib_put) {
@@ -239,10 +240,10 @@ nouveau_fifo_irq_handler(struct drm_device *dev) 
			} else {

				NV_INFO(dev, "PFIFO_DMA_PUSHER - Ch %d Get 0x%08x "

					     "Put 0x%08x State 0x%08x Push 0x%08x\n",

					chid, get, put, state, push);

					chid, dma_get, dma_put, state, push);



				if (get != put)

					nv_wr32(dev, 0x003244, put);

				if (dma_get != dma_put)

					nv_wr32(dev, 0x003244, dma_put);

			}



			nv_wr32(dev, 0x003228, 0x00000000);

drivers/gpu/drm/nouveau/nouveau_mem.c

+3 −3
Original line number Diff line number Diff line
@@ -33,9 +33,9 @@ 
#include "drmP.h"

#include "drm.h"

#include "drm_sarea.h"

#include "nouveau_drv.h"



#define MIN(a,b) a < b ? a : b

#include "nouveau_drv.h"

#include "nouveau_pm.h"



/*

 * NV10-NV40 tiling helpers
@@ -719,7 +719,7 @@ nouveau_mem_timing_init(struct drm_device *dev) 
		tUNK_19 = 1;

		tUNK_20 = 0;

		tUNK_21 = 0;

		switch (MIN(recordlen,21)) {

		switch (min(recordlen, 21)) {

		case 21:

			tUNK_21 = entry[21];

		case 20: