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Commit cb9ea8b6 authored by Roger Quadros's avatar Roger Quadros Committed by Tony Lindgren
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ARM: dts: am437x: Disable wait pin monitoring for NAND 



The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].

[1] AM437x TRM: SPRUHL7D: 9.1.3.3.12.2 NAND Device-Ready Pin

Signed-off-by: default avatarRoger Quadros <rogerq@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent be3f39c8

arch/arm/boot/dts/am437x-cm-t43.dts

+0 −5
Original line number Diff line number Diff line
@@ -170,17 +170,12 @@ 
		gpmc,access-ns = <64>;

		gpmc,rd-cycle-ns = <82>;

		gpmc,wr-cycle-ns = <82>;

		gpmc,wait-on-read = "true";

		gpmc,wait-on-write = "true";

		gpmc,bus-turnaround-ns = <0>;

		gpmc,cycle2cycle-delay-ns = <0>;

		gpmc,clk-activation-ns = <0>;

		gpmc,wait-monitoring-ns = <0>;

		gpmc,wr-access-ns = <40>;

		gpmc,wr-data-mux-bus-ns = <0>;



		gpmc,wait-pin = <0>;



		#address-cells = <1>;

		#size-cells = <1>;

		/* MTD partition table */

arch/arm/boot/dts/am437x-gp-evm.dts

+0 −2
Original line number Diff line number Diff line
@@ -837,11 +837,9 @@ 
		gpmc,access-ns = <30>;

		gpmc,rd-cycle-ns = <40>;

		gpmc,wr-cycle-ns = <40>;

		gpmc,wait-pin = <0>;

		gpmc,bus-turnaround-ns = <0>;

		gpmc,cycle2cycle-delay-ns = <0>;

		gpmc,clk-activation-ns = <0>;

		gpmc,wait-monitoring-ns = <0>;

		gpmc,wr-access-ns = <40>;

		gpmc,wr-data-mux-bus-ns = <0>;

		/* MTD partition table */

arch/arm/boot/dts/am43x-epos-evm.dts

+0 −2
Original line number Diff line number Diff line
@@ -586,11 +586,9 @@ 
		gpmc,access-ns = <30>; /* tCEA + 4*/

		gpmc,rd-cycle-ns = <40>;

		gpmc,wr-cycle-ns = <40>;

		gpmc,wait-pin = <0>;

		gpmc,bus-turnaround-ns = <0>;

		gpmc,cycle2cycle-delay-ns = <0>;

		gpmc,clk-activation-ns = <0>;

		gpmc,wait-monitoring-ns = <0>;

		gpmc,wr-access-ns = <40>;

		gpmc,wr-data-mux-bus-ns = <0>;

		/* MTD partition table */