Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit cb97def8 authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge branches 'misc' and 'powercap' 

* misc:
  MAINTAINERS: Reorder maintainer addresses for PM and ACPI

* powercap:
  powercap / intel_rapl: spell out SoC names
  powercap / intel_rapl: relax sanity check on energy counters
parents 6ac4a2ab 7fb06082 d6b2e6d0

MAINTAINERS

+4 −4
Original line number Diff line number Diff line
@@ -242,8 +242,8 @@ S: Maintained 
F:	drivers/platform/x86/acer-wmi.c



ACPI

M:	Len Brown <lenb@kernel.org>

M:	Rafael J. Wysocki <rjw@rjwysocki.net>

M:	Len Brown <lenb@kernel.org>

L:	linux-acpi@vger.kernel.org

W:	https://01.org/linux-acpi

Q:	https://patchwork.kernel.org/project/linux-acpi/list/
@@ -3657,8 +3657,8 @@ S: Maintained 
F:	fs/freevxfs/



FREEZER

M:	Pavel Machek <pavel@ucw.cz>

M:	"Rafael J. Wysocki" <rjw@rjwysocki.net>

M:	Pavel Machek <pavel@ucw.cz>

L:	linux-pm@vger.kernel.org

S:	Supported

F:	Documentation/power/freezing-of-tasks.txt
@@ -4022,8 +4022,8 @@ S: Maintained 
F:	drivers/video/hgafb.c



HIBERNATION (aka Software Suspend, aka swsusp)

M:	Pavel Machek <pavel@ucw.cz>

M:	"Rafael J. Wysocki" <rjw@rjwysocki.net>

M:	Pavel Machek <pavel@ucw.cz>

L:	linux-pm@vger.kernel.org

S:	Supported

F:	arch/x86/power/
@@ -8425,9 +8425,9 @@ F: arch/sh/ 
F:	drivers/sh/



SUSPEND TO RAM

M:	"Rafael J. Wysocki" <rjw@rjwysocki.net>

M:	Len Brown <len.brown@intel.com>

M:	Pavel Machek <pavel@ucw.cz>

M:	"Rafael J. Wysocki" <rjw@rjwysocki.net>

L:	linux-pm@vger.kernel.org

S:	Supported

F:	Documentation/power/

drivers/powercap/intel_rapl.c

+11 −6
Original line number Diff line number Diff line
@@ -834,7 +834,7 @@ static int rapl_write_data_raw(struct rapl_domain *rd, 
}



static const struct x86_cpu_id energy_unit_quirk_ids[] = {

	{ X86_VENDOR_INTEL, 6, 0x37},/* VLV */

	{ X86_VENDOR_INTEL, 6, 0x37},/* Valleyview */

	{}

};
@@ -947,11 +947,11 @@ static void package_power_limit_irq_restore(int package_id) 
}



static const struct x86_cpu_id rapl_ids[] = {

	{ X86_VENDOR_INTEL, 6, 0x2a},/* SNB */

	{ X86_VENDOR_INTEL, 6, 0x2d},/* SNB EP */

	{ X86_VENDOR_INTEL, 6, 0x37},/* VLV */

	{ X86_VENDOR_INTEL, 6, 0x3a},/* IVB */

	{ X86_VENDOR_INTEL, 6, 0x45},/* HSW */

	{ X86_VENDOR_INTEL, 6, 0x2a},/* Sandy Bridge */

	{ X86_VENDOR_INTEL, 6, 0x2d},/* Sandy Bridge EP */

	{ X86_VENDOR_INTEL, 6, 0x37},/* Valleyview */

	{ X86_VENDOR_INTEL, 6, 0x3a},/* Ivy Bridge */

	{ X86_VENDOR_INTEL, 6, 0x45},/* Haswell */

	/* TODO: Add more CPU IDs after testing */

	{}

};
@@ -1147,6 +1147,11 @@ static int rapl_check_domain(int cpu, int domain) 
	if (rdmsrl_safe_on_cpu(cpu, msr, &val1))

		return -ENODEV;



	/* PP1/uncore/graphics domain may not be active at the time of

	 * driver loading. So skip further checks.

	 */

	if (domain == RAPL_DOMAIN_PP1)

		return 0;

	/* energy counters roll slowly on some domains */

	while (++retry < 10) {

		usleep_range(10000, 15000);