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Commit cb547a4f authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Enabling display on MTP"

parents 926e47f1 4a4e490e
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+3 −2
Original line number Diff line number Diff line
@@ -8,11 +8,12 @@ Required properties:
- compatible:           Should be "qcom,dsi-ctrl-hw-v<version>". Supported
			versions include 1.4, 2.0 and 2.2.
			eg: qcom,dsi-ctrl-hw-v1.4, qcom,dsi-ctrl-hw-v2.0,
			qcom,dsi-ctrl-hw-v2.2, qcom,dsi-ctrl-hw-v2.3
			qcom,dsi-ctrl-hw-v2.2, qcom,dsi-ctrl-hw-v2.3,
			qcom,dsi-ctrl-hw-v2.4
			And for dsi phy driver:
			qcom,dsi-phy-v0.0-hpm, qcom,dsi-phy-v0.0-lpm,
			qcom,dsi-phy-v1.0, qcom,dsi-phy-v2.0,
			qcom,dsi-phy-v3.0, qcom,dsi-phy-v4.0
			qcom,dsi-phy-v3.0, qcom,dsi-phy-v4.0, qcom,dsi-phy-v4.1
- reg:                  Base address and length of DSI controller's memory
			mapped regions.
- reg-names:            A list of strings that name the list of regs.
+14 −0
Original line number Diff line number Diff line
@@ -70,6 +70,20 @@
	};
};

&dsi_sw43404_amoled_cmd {
	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
	qcom,mdss-dsi-bl-min-level = <1>;
	qcom,mdss-dsi-bl-max-level = <1023>;
	qcom,mdss-brightness-max-level = <255>;
	qcom,platform-te-gpio = <&tlmm 66 0>;
	qcom,platform-reset-gpio = <&tlmm 75 0>;
};

&sde_dsi {
	qcom,dsi-default-panel = <&dsi_sw43404_amoled_cmd>;
};

&pm8150b_vadc {
	#address-cells = <1>;
	#size-cells = <0>;
+14 −0
Original line number Diff line number Diff line
@@ -287,3 +287,17 @@
		qcom,hw-settle-time = <200>;
	};
};

&dsi_sw43404_amoled_cmd {
	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
	qcom,mdss-dsi-bl-min-level = <1>;
	qcom,mdss-dsi-bl-max-level = <1023>;
	qcom,mdss-brightness-max-level = <255>;
	qcom,platform-te-gpio = <&tlmm 66 0>;
	qcom,platform-reset-gpio = <&tlmm 75 0>;
};

&sde_dsi {
	qcom,dsi-default-panel = <&dsi_sw43404_amoled_cmd>;
};
+108 −0
Original line number Diff line number Diff line
@@ -664,6 +664,114 @@
			};
		};

		pmx_sde: pmx_sde {
			sde_dsi_active: sde_dsi_active {
				mux {
					pins = "gpio75";
					function = "gpio";
				};

				config {
					pins = "gpio75";
					drive-strength = <8>;   /* 8 mA */
					bias-disable = <0>;   /* no pull */
				};
			};

			sde_dsi_suspend: sde_dsi_suspend {
				mux {
					pins = "gpio75";
					function = "gpio";
				};

				config {
					pins = "gpio75";
					drive-strength = <2>;   /* 2 mA */
					bias-pull-down;         /* PULL DOWN */
				};
			};

			sde_dsi1_active: sde_dsi1_active {
				mux {
					pins = "gpio128";
					function = "gpio";
				};

				config {
					pins = "gpio128";
					drive-strength = <8>;   /* 8 mA */
					bias-disable = <0>;   /* no pull */
				};
			};

			sde_dsi1_suspend: sde_dsi1_suspend {
				mux {
					pins = "gpio128";
					function = "gpio";
				};

				config {
					pins = "gpio128";
					drive-strength = <2>;   /* 2 mA */
					bias-pull-down;         /* PULL DOWN */
				};
			};
		};

		pmx_sde_te {
			sde_te_active: sde_te_active {
				mux {
					pins = "gpio66";
					function = "mdp_vsync";
				};

				config {
					pins = "gpio66";
					drive-strength = <2>;   /* 2 mA */
					bias-pull-down;         /* PULL DOWN */
				};
			};

			sde_te_suspend: sde_te_suspend {
				mux {
					pins = "gpio66";
					function = "mdp_vsync";
				};

				config {
					pins = "gpio66";
					drive-strength = <2>;   /* 2 mA */
					bias-pull-down;         /* PULL DOWN */
				};
			};

			sde_te1_active: sde_te1_active {
				mux {
					pins = "gpio67";
					function = "mdp_vsync";
				};

				config {
					pins = "gpio67";
					drive-strength = <2>;   /* 2 mA */
					bias-pull-down;         /* PULL DOWN */
				};
			};

			sde_te1_suspend: sde_te1_suspend {
				mux {
					pins = "gpio67";
					function = "mdp_vsync";
				};

				config {
					pins = "gpio67";
					drive-strength = <2>;   /* 2 mA */
					bias-pull-down;         /* PULL DOWN */
				};
			};
		};

		wsa_swr_clk_pin {
			wsa_swr_clk_sleep: wsa_swr_clk_sleep {
				mux {
+68 −1
Original line number Diff line number Diff line
@@ -3,6 +3,9 @@
 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
 */

#include "dsi-panel-sw43404-amoled-dsc-wqhd-cmd.dtsi"
#include <dt-bindings/clock/mdss-7nm-pll-clk.h>

&soc {
	ext_disp: qcom,msm-ext-disp {
		compatible = "qcom,msm-ext-disp";
@@ -12,6 +15,59 @@
		};
	};

	dsi_panel_pwr_supply: dsi_panel_pwr_supply {
		#address-cells = <1>;
		#size-cells = <0>;

		qcom,panel-supply-entry@0 {
			reg = <0>;
			qcom,supply-name = "vddio";
			qcom,supply-min-voltage = <1800000>;
			qcom,supply-max-voltage = <1800000>;
			qcom,supply-enable-load = <62000>;
			qcom,supply-disable-load = <80>;
			qcom,supply-post-on-sleep = <20>;
		};

		qcom,panel-supply-entry@1 {
			reg = <1>;
			qcom,supply-name = "vdd";
			qcom,supply-min-voltage = <3300000>;
			qcom,supply-max-voltage = <3300000>;
			qcom,supply-enable-load = <857000>;
			qcom,supply-disable-load = <0>;
			qcom,supply-post-on-sleep = <0>;
		};
	};

	sde_dsi: qcom,dsi-display-primary {
		compatible = "qcom,dsi-display";
		label = "primary";

		qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
		qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;

		clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
			 <&mdss_dsi0_pll PCLK_MUX_0_CLK>,
			 <&mdss_dsi1_pll BYTECLK_MUX_1_CLK>,
			 <&mdss_dsi1_pll PCLK_MUX_1_CLK>;
		clock-names = "src_byte_clk0", "src_pixel_clk0",
			      "src_byte_clk1", "src_pixel_clk1";

		pinctrl-names = "panel_active", "panel_suspend";
		pinctrl-0 = <&sde_dsi_active &sde_te_active>;
		pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;

		qcom,platform-te-gpio = <&tlmm 66 0>;
		qcom,panel-te-source = <0>;

		vddio-supply = <&pm8150_l14>;
		vdd-supply = <&pm8150a_l11>;

		qcom,mdp = <&mdss_mdp>;
		qcom,dsi-default-panel = <&dsi_sw43404_amoled_cmd>;
	};

	sde_wb: qcom,wb-display@0 {
		compatible = "qcom,wb-display";
		cell-index = <0>;
@@ -32,5 +88,16 @@
};

&mdss_mdp {
	connectors = <&sde_dp &sde_wb>;
	connectors = <&sde_dp &sde_wb &sde_dsi>;
};

&dsi_sw43404_amoled_cmd {
	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 14 05 05 1f 1e 05
				05 03 02 04 00 12 15];
			qcom,display-topology = <2 2 1>;
			qcom,default-topology-index = <0>;
		};
	};
};
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