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Commit cb2ad5e5 authored by Alexey Brodkin's avatar Alexey Brodkin
Browse files

ARC: [axs10x] Specify reserved memory for frame buffer 



Allocation of a frame buffer memory in a special memory region
allows bypassing of so-called IO Coherency aperture
which is typically set as a range 0x8z-0xAz.

I.e. all data traffic to PGU bypasses IO Coherency block
and saves its bandwidth for other peripherals.

Even though for AXS101 (which sorts ARC770 CPU) IOC is not
an option for a sake of keeping one DT description for the
base-board (axs10x_mb.dtsi) we're still defining reserved
memory location in the very end of DDR.

Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
Acked-by: default avatarVineet Gupta <vgupta@synopsys.com>
Cc: devicetree@vger.kernel.org
parent 8aeab995

arch/arc/boot/dts/axc001.dtsi

+20 −2
Original line number Original line Diff line number Diff line
@@ -93,8 +93,26 @@ 
	memory {

	memory {

		#address-cells = <1>;

		#address-cells = <1>;

		#size-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x80000000 0x40000000>;

		ranges = <0x00000000 0x80000000 0x20000000>;

		device_type = "memory";

		device_type = "memory";

		reg = <0x80000000 0x20000000>;	/* 512MiB */

		reg = <0x80000000 0x1b000000>;	/* (512 - 32) MiB */

	};



	reserved-memory {

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;

		/*

		 * We just move frame buffer area to the very end of

		 * available DDR. And even though in case of ARC770 there's

		 * no strict requirement for a frame-buffer to be in any

		 * particular location it allows us to use the same

		 * base board's DT node for ARC PGU as for ARc HS38.

		 */

		frame_buffer: frame_buffer@9e000000 {

			compatible = "shared-dma-pool";

			reg = <0x9e000000 0x2000000>;

			no-map;

		};

	};

	};

};
 
};

arch/arc/boot/dts/axc003.dtsi

+14 −0
Original line number Original line Diff line number Diff line
@@ -100,4 +100,18 @@ 
		device_type = "memory";

		device_type = "memory";

		reg = <0x80000000 0x20000000>;	/* 512MiB */

		reg = <0x80000000 0x20000000>;	/* 512MiB */

	};

	};



	reserved-memory {

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;

		/*

		 * Move frame buffer out of IOC aperture (0x8z-0xAz).

		 */

		frame_buffer: frame_buffer@be000000 {

			compatible = "shared-dma-pool";

			reg = <0xbe000000 0x2000000>;

			no-map;

		};

	};

};
 
};

arch/arc/boot/dts/axc003_idu.dtsi

+14 −0
Original line number Original line Diff line number Diff line
@@ -123,4 +123,18 @@ 
		device_type = "memory";

		device_type = "memory";

		reg = <0x80000000 0x20000000>;	/* 512MiB */

		reg = <0x80000000 0x20000000>;	/* 512MiB */

	};

	};



	reserved-memory {

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;

		/*

		 * Move frame buffer out of IOC aperture (0x8z-0xAz).

		 */

		frame_buffer: frame_buffer@be000000 {

			compatible = "shared-dma-pool";

			reg = <0xbe000000 0x2000000>;

			no-map;

		};

	};

};
 
};

arch/arc/boot/dts/axs10x_mb.dtsi

+1 −1
Original line number Original line Diff line number Diff line
@@ -283,7 +283,7 @@ 
			encoder-slave = <&adv7511>;

			encoder-slave = <&adv7511>;

			clocks = <&pguclk>;

			clocks = <&pguclk>;

			clock-names = "pxlclk";

			clock-names = "pxlclk";



			memory-region = <&frame_buffer>;

			port {

			port {

				pgu_output: endpoint {

				pgu_output: endpoint {

					remote-endpoint = <&adv7511_input>;

					remote-endpoint = <&adv7511_input>;