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Commit cb24e31e authored by Naman Padhiar's avatar Naman Padhiar
Browse files

icnss2: Send SMMU IOVA range only when SMMU S1 is enabled 



Send SMMU IOVA range to FW only when SMMU S1 stage is
enabled.

Change-Id: I3d0d0b6ad3db18aded0d921f79337cf845ceb5f4
Signed-off-by: default avatarNaman Padhiar <npadhiar@codeaurora.org>
parent b96c51e7

drivers/soc/qcom/icnss2/main.c

+8 −0
Original line number Diff line number Diff line
@@ -2979,6 +2979,7 @@ static int icnss_smmu_dt_parse(struct icnss_priv *priv) 
	int ret = 0;

	struct platform_device *pdev = priv->pdev;

	struct device *dev = &pdev->dev;

	const char *iommu_dma_type;

	struct resource *res;

	u32 addr_win[2];
@@ -2999,6 +3000,13 @@ static int icnss_smmu_dt_parse(struct icnss_priv *priv) 
		priv->iommu_domain =

			iommu_get_domain_for_dev(&pdev->dev);



		ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",

					      &iommu_dma_type);

		if (!ret && !strcmp("fastmap", iommu_dma_type)) {

			icnss_pr_dbg("SMMU S1 stage enabled\n");

			priv->smmu_s1_enable = true;

		}



		res = platform_get_resource_byname(pdev,

						   IORESOURCE_MEM,

						   "smmu_iova_ipa");

drivers/soc/qcom/icnss2/main.h

+1 −0
Original line number Diff line number Diff line
@@ -378,6 +378,7 @@ struct icnss_priv { 
	bool vbatt_supported;

	char function_name[WLFW_FUNCTION_NAME_LEN + 1];

	bool is_ssr;

	bool smmu_s1_enable;

	struct kobject *icnss_kobject;

	atomic_t is_shutdown;

	u32 qdss_mem_seg_len;

drivers/soc/qcom/icnss2/qmi.c

+2 −1
Original line number Diff line number Diff line
@@ -2322,7 +2322,8 @@ int wlfw_host_cap_send_sync(struct icnss_priv *priv) 
	req->cal_done = priv->cal_done;

	icnss_pr_dbg("Calibration done is %d\n", priv->cal_done);



	if (!icnss_get_iova(priv, &iova_start, &iova_size) &&

	if (priv->smmu_s1_enable &&

	    !icnss_get_iova(priv, &iova_start, &iova_size) &&

	    !icnss_get_iova_ipa(priv, &iova_ipa_start,

				&iova_ipa_size)) {

		req->ddr_range_valid = 1;