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Commit cabeea98 authored by Mark Brown's avatar Mark Brown
Browse files

Merge remote-tracking branches 'spi/topic/sun4i', 'spi/topic/topcliff-pch' and...

Merge remote-tracking branches 'spi/topic/sun4i', 'spi/topic/topcliff-pch' and 'spi/topic/zynq' into spi-next
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+1 −1
Original line number Diff line number Diff line
@@ -585,7 +585,7 @@ config SPI_TEGRA20_SLINK

config SPI_TOPCLIFF_PCH
	tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) SPI"
	depends on PCI && (X86_32 || COMPILE_TEST)
	depends on PCI && (X86_32 || MIPS || COMPILE_TEST)
	help
	  SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus
	  used in some x86 embedded processors.
+4 −4
Original line number Diff line number Diff line
@@ -229,8 +229,8 @@ static int sun4i_spi_transfer_one(struct spi_master *master,

	/* Ensure that we have a parent clock fast enough */
	mclk_rate = clk_get_rate(sspi->mclk);
	if (mclk_rate < (2 * spi->max_speed_hz)) {
		clk_set_rate(sspi->mclk, 2 * spi->max_speed_hz);
	if (mclk_rate < (2 * tfr->speed_hz)) {
		clk_set_rate(sspi->mclk, 2 * tfr->speed_hz);
		mclk_rate = clk_get_rate(sspi->mclk);
	}

@@ -248,14 +248,14 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
	 * First try CDR2, and if we can't reach the expected
	 * frequency, fall back to CDR1.
	 */
	div = mclk_rate / (2 * spi->max_speed_hz);
	div = mclk_rate / (2 * tfr->speed_hz);
	if (div <= (SUN4I_CLK_CTL_CDR2_MASK + 1)) {
		if (div > 0)
			div--;

		reg = SUN4I_CLK_CTL_CDR2(div) | SUN4I_CLK_CTL_DRS;
	} else {
		div = ilog2(mclk_rate) - ilog2(spi->max_speed_hz);
		div = ilog2(mclk_rate) - ilog2(tfr->speed_hz);
		reg = SUN4I_CLK_CTL_CDR1(div);
	}

+4 −4
Original line number Diff line number Diff line
@@ -217,8 +217,8 @@ static int sun6i_spi_transfer_one(struct spi_master *master,

	/* Ensure that we have a parent clock fast enough */
	mclk_rate = clk_get_rate(sspi->mclk);
	if (mclk_rate < (2 * spi->max_speed_hz)) {
		clk_set_rate(sspi->mclk, 2 * spi->max_speed_hz);
	if (mclk_rate < (2 * tfr->speed_hz)) {
		clk_set_rate(sspi->mclk, 2 * tfr->speed_hz);
		mclk_rate = clk_get_rate(sspi->mclk);
	}

@@ -236,14 +236,14 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
	 * First try CDR2, and if we can't reach the expected
	 * frequency, fall back to CDR1.
	 */
	div = mclk_rate / (2 * spi->max_speed_hz);
	div = mclk_rate / (2 * tfr->speed_hz);
	if (div <= (SUN6I_CLK_CTL_CDR2_MASK + 1)) {
		if (div > 0)
			div--;

		reg = SUN6I_CLK_CTL_CDR2(div) | SUN6I_CLK_CTL_DRS;
	} else {
		div = ilog2(mclk_rate) - ilog2(spi->max_speed_hz);
		div = ilog2(mclk_rate) - ilog2(tfr->speed_hz);
		reg = SUN6I_CLK_CTL_CDR1(div);
	}

+2 −6
Original line number Diff line number Diff line
@@ -917,9 +917,7 @@ static int zynqmp_qspi_start_transfer(struct spi_master *master,
 */
static int __maybe_unused zynqmp_qspi_suspend(struct device *dev)
{
	struct platform_device *pdev = container_of(dev,
						    struct platform_device,
						    dev);
	struct platform_device *pdev = to_platform_device(dev);
	struct spi_master *master = platform_get_drvdata(pdev);

	spi_master_suspend(master);
@@ -940,9 +938,7 @@ static int __maybe_unused zynqmp_qspi_suspend(struct device *dev)
 */
static int __maybe_unused zynqmp_qspi_resume(struct device *dev)
{
	struct platform_device *pdev = container_of(dev,
						    struct platform_device,
						    dev);
	struct platform_device *pdev = to_platform_device(dev);
	struct spi_master *master = platform_get_drvdata(pdev);
	struct zynqmp_qspi *xqspi = spi_master_get_devdata(master);
	int ret = 0;