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Commit ca8b4822 authored by Srinivas Rao L's avatar Srinivas Rao L Committed by Maulik Shah
Browse files

ARM: dts: msm: Add RSC mailbox controller device nodes for Lito 



Add mailbox controller device nodes for application processor and
display subsystem.

Change-Id: I0ce09d24b23cb43077837ec17fc273a7abb3f487
Signed-off-by: default avatarSrinivas Rao L <lsrao@codeaurora.org>
Signed-off-by: default avatarMaulik Shah <mkshah@codeaurora.org>
parent 38014262

arch/arm64/boot/dts/qcom/lito.dtsi

+34 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ 
#include <dt-bindings/clock/qcom,rpmh.h>

#include <dt-bindings/clock/qcom,videocc-lito.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/soc/qcom,rpmh-rsc.h>



/ {

	model = "Qualcomm Technologies, Inc. Lito";
@@ -866,6 +867,39 @@ 
		#clock-cells = <1>;

		#reset-cells = <1>;

	};



	apps_rsc: rsc@18200000 {

		label = "apps_rsc";

		compatible = "qcom,rpmh-rsc";

		reg = <0x18200000 0x10000>,

		      <0x18210000 0x10000>,

		      <0x18220000 0x10000>;

		reg-names = "drv-0", "drv-1", "drv-2";

		interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;

		qcom,tcs-offset = <0xd00>;

		qcom,drv-id = <2>;

		qcom,tcs-config = <ACTIVE_TCS  2>,

				  <SLEEP_TCS   3>,

				  <WAKE_TCS    3>,

				  <CONTROL_TCS 1>;



	};



	disp_rsc: rsc@af20000 {

		label = "disp_rsc";

		compatible = "qcom,rpmh-rsc";

		reg = <0xaf20000 0x10000>;

		reg-names = "drv-0";

		interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;

		qcom,tcs-offset = <0x1c00>;

		qcom,drv-id = <0>;

		qcom,tcs-config = <ACTIVE_TCS  0>,

				  <SLEEP_TCS   1>,

				  <WAKE_TCS    1>,

				  <CONTROL_TCS 0>;

	};

};



#include "lito-pinctrl.dtsi"