drm/msm/sde: remove support for online rotator v1 (ca86eb4c) · Commits · e / devices / android_kernel_fairphone_FP4

drivers/gpu/drm/msm/msm_drv.h

+0 −6

Original line number	Diff line number	Diff line
		@@ -95,7 +95,6 @@ enum msm_mdp_plane_property {
		PLANE_PROP_VIG_IGC,
		PLANE_PROP_DMA_IGC,
		PLANE_PROP_DMA_GC,
		PLANE_PROP_ROT_CAPS_V1,

		/* # of blob properties */
		PLANE_PROP_BLOBCOUNT,
		@@ -112,15 +111,10 @@ enum msm_mdp_plane_property {
		PLANE_PROP_VALUE_ADJUST,
		PLANE_PROP_CONTRAST_ADJUST,
		PLANE_PROP_EXCL_RECT_V1,
		PLANE_PROP_ROT_DST_X,
		PLANE_PROP_ROT_DST_Y,
		PLANE_PROP_ROT_DST_W,
		PLANE_PROP_ROT_DST_H,
		PLANE_PROP_PREFILL_SIZE,
		PLANE_PROP_PREFILL_TIME,
		PLANE_PROP_SCALER_V1,
		PLANE_PROP_SCALER_V2,
		PLANE_PROP_ROT_OUT_FB,
		PLANE_PROP_INVERSE_PMA,

		/* enum/bitmask properties */

drivers/gpu/drm/msm/sde/sde_crtc.c

+8 −286

Original line number	Diff line number	Diff line
		@@ -1639,58 +1639,6 @@ static void _sde_crtc_program_lm_output_roi(struct drm_crtc *crtc)
		}
		}

		/**
		* _sde_crtc_calc_inline_prefill - calculate rotator start prefill
		* @crtc: Pointer to drm crtc
		* return: prefill time in lines
		*/
		static u32 _sde_crtc_calc_inline_prefill(struct drm_crtc *crtc)
		{
		struct sde_kms *sde_kms;

		if (!crtc) {
		SDE_ERROR("invalid parameters\n");
		return 0;
		}

		sde_kms = _sde_crtc_get_kms(crtc);
		if (!sde_kms \|\| !sde_kms->catalog) {
		SDE_ERROR("invalid kms\n");
		return 0;
		}

		return sde_kms->catalog->sbuf_prefill + sde_kms->catalog->sbuf_headroom;
		}

		uint64_t sde_crtc_get_sbuf_clk(struct drm_crtc_state *state)
		{
		struct sde_crtc_state *cstate;
		u64 tmp;

		if (!state) {
		SDE_ERROR("invalid crtc state\n");
		return 0;
		}
		cstate = to_sde_crtc_state(state);

		/*
		* Select the max of the current and previous frame's user mode
		* clock setting so that reductions in clock voting don't take effect
		* until the current frame has completed.
		*
		* If the sbuf_clk_rate[] FIFO hasn't yet been updated in this commit
		* cycle (as part of the CRTC's atomic check), compare the current
		* clock value against sbuf_clk_rate[1] instead of comparing the
		* sbuf_clk_rate[0]/sbuf_clk_rate[1] values.
		*/
		if (cstate->sbuf_clk_shifted)
		tmp = cstate->sbuf_clk_rate[0];
		else
		tmp = sde_crtc_get_property(cstate, CRTC_PROP_ROT_CLK);

		return max_t(u64, cstate->sbuf_clk_rate[1], tmp);
		}

		static void _sde_crtc_blend_setup_mixer(struct drm_crtc *crtc,
		struct drm_crtc_state old_state, struct sde_crtc sde_crtc,
		struct sde_crtc_mixer *mixer)
		@@ -1705,10 +1653,9 @@ static void _sde_crtc_blend_setup_mixer(struct drm_crtc *crtc,
		struct sde_hw_mixer *lm;
		struct sde_hw_stage_cfg *stage_cfg;
		struct sde_rect plane_crtc_roi;
		uint32_t prefill;
		uint32_t stage_idx, lm_idx;
		int zpos_cnt[SDE_STAGE_MAX + 1] = { 0 };
		int i, rot_id = 0;
		int i;
		bool bg_alpha_enable = false;

		if (!sde_crtc \|\| !crtc->state \|\| !mixer) {
		@@ -1721,11 +1668,6 @@ static void _sde_crtc_blend_setup_mixer(struct drm_crtc *crtc,
		stage_cfg = &sde_crtc->stage_cfg;
		cstate = to_sde_crtc_state(crtc->state);

		cstate->sbuf_prefill_line = _sde_crtc_calc_inline_prefill(crtc);
		sde_crtc->sbuf_rot_id_old = sde_crtc->sbuf_rot_id;
		sde_crtc->sbuf_rot_id = 0x0;
		sde_crtc->sbuf_rot_id_delta = 0x0;

		drm_atomic_crtc_for_each_plane(plane, crtc) {
		state = plane->state;
		if (!state)
		@@ -1739,21 +1681,7 @@ static void _sde_crtc_blend_setup_mixer(struct drm_crtc *crtc,
		pstate = to_sde_plane_state(state);
		fb = state->fb;

		/* assume all rotated planes report the same prefill amount */
		prefill = sde_plane_rot_get_prefill(plane);
		if (prefill)
		cstate->sbuf_prefill_line = prefill;

		sde_plane_ctl_flush(plane, ctl, true);
		rot_id = sde_plane_get_sbuf_id(plane);

		/* save sbuf id for later */
		if (old_state && drm_atomic_get_existing_plane_state(
		old_state->state, plane) &&
		!sde_crtc->sbuf_rot_id_old)
		sde_crtc->sbuf_rot_id_delta = rot_id;
		if (!sde_crtc->sbuf_rot_id)
		sde_crtc->sbuf_rot_id = rot_id;

		SDE_DEBUG("crtc %d stage:%d - plane %d sspp %d fb %d\n",
		crtc->base.id,
		@@ -1776,8 +1704,7 @@ static void _sde_crtc_blend_setup_mixer(struct drm_crtc *crtc,
		state->src_x >> 16, state->src_y >> 16,
		state->src_w >> 16, state->src_h >> 16,
		state->crtc_x, state->crtc_y,
		state->crtc_w, state->crtc_h,
		rot_id != 0);
		state->crtc_w, state->crtc_h);

		stage_idx = zpos_cnt[pstate->stage]++;
		stage_cfg->stage[pstate->stage][stage_idx] =
		@@ -3615,88 +3542,6 @@ static int _sde_crtc_flush_event_thread(struct drm_crtc *crtc)
		return 0;
		}

		static int _sde_crtc_commit_kickoff_rot(struct drm_crtc *crtc,
		struct sde_crtc_state *cstate)
		{
		struct drm_plane *plane;
		struct sde_crtc *sde_crtc;
		struct sde_hw_ctl ctl, master_ctl;
		enum sde_rot rot_id = SDE_NONE;
		int i, rc = 0;

		if (!crtc \|\| !cstate)
		return -EINVAL;

		sde_crtc = to_sde_crtc(crtc);

		/*
		* Update sbuf configuration and flush rotator if the rot_op_mode
		* is different or a rotator commit was performed.
		*
		* In case where the rot_op_mode has changed, further require that
		* the transition is either to or from offline mode unless corresponding
		* plane update was provided to current commit.
		*/
		rot_id = sde_crtc->sbuf_rot_id_delta;
		if ((sde_crtc->sbuf_op_mode_old != cstate->sbuf_cfg.rot_op_mode) &&
		(sde_crtc->sbuf_op_mode_old == SDE_CTL_ROT_OP_MODE_OFFLINE \|\|
		cstate->sbuf_cfg.rot_op_mode == SDE_CTL_ROT_OP_MODE_OFFLINE))
		rot_id \|= sde_crtc->sbuf_rot_id \|
		sde_crtc->sbuf_rot_id_old;

		if (!rot_id &&
		cstate->sbuf_cfg.rot_op_mode == SDE_CTL_ROT_OP_MODE_OFFLINE)
		return 0;

		SDE_ATRACE_BEGIN("crtc_kickoff_rot");

		if (cstate->sbuf_cfg.rot_op_mode != SDE_CTL_ROT_OP_MODE_OFFLINE &&
		sde_crtc->sbuf_rot_id_delta) {
		drm_atomic_crtc_for_each_plane(plane, crtc) {
		rc = sde_plane_kickoff_rot(plane);
		if (rc) {
		SDE_ERROR("crtc%d cancelling inline rotation\n",
		crtc->base.id);
		SDE_EVT32(DRMID(crtc), SDE_EVTLOG_ERROR);

		/* revert to offline on errors */
		cstate->sbuf_cfg.rot_op_mode =
		SDE_CTL_ROT_OP_MODE_OFFLINE;
		break;
		}
		}
		}

		master_ctl = NULL;
		for (i = 0; i < sde_crtc->num_ctls; i++) {
		ctl = sde_crtc->mixers[i].hw_ctl;
		if (!ctl)
		continue;

		if (!master_ctl \|\| master_ctl->idx > ctl->idx)
		master_ctl = ctl;

		if (ctl->ops.setup_sbuf_cfg)
		ctl->ops.setup_sbuf_cfg(ctl, &cstate->sbuf_cfg);
		}

		/* only update sbuf_cfg and flush for master ctl */
		if (master_ctl && master_ctl->ops.update_bitmask_rot) {
		master_ctl->ops.update_bitmask_rot(master_ctl, rot_id, 1);

		/* defer ROT_START trigger until CTL_START */
		SDE_EVT32(DRMID(crtc), master_ctl->idx - CTL_0,
		sde_crtc->sbuf_rot_id,
		sde_crtc->sbuf_rot_id_delta);
		}

		/* save this in sde_crtc for next commit cycle */
		sde_crtc->sbuf_op_mode_old = cstate->sbuf_cfg.rot_op_mode;

		SDE_ATRACE_END("crtc_kickoff_rot");
		return rc;
		}

		/**
		* _sde_crtc_remove_pipe_flush - remove staged pipes from flush mask
		* @crtc: Pointer to crtc structure
		@@ -3742,11 +3587,9 @@ static int _sde_crtc_reset_hw(struct drm_crtc *crtc,
		struct drm_plane *plane_halt[MAX_PLANES];
		struct drm_plane *plane;
		struct drm_encoder *encoder;
		const struct drm_plane_state *pstate;
		struct sde_crtc *sde_crtc;
		struct sde_crtc_state *cstate;
		struct sde_hw_ctl *ctl;
		enum sde_ctl_rot_op_mode old_rot_op_mode;
		signed int i, plane_count;
		int rc;

		@@ -3755,9 +3598,7 @@ static int _sde_crtc_reset_hw(struct drm_crtc *crtc,
		sde_crtc = to_sde_crtc(crtc);
		cstate = to_sde_crtc_state(crtc->state);

		old_rot_op_mode = to_sde_crtc_state(old_state)->sbuf_cfg.rot_op_mode;
		SDE_EVT32(DRMID(crtc), old_rot_op_mode,
		recovery_events, SDE_EVTLOG_FUNC_ENTRY);
		SDE_EVT32(DRMID(crtc), recovery_events, SDE_EVTLOG_FUNC_ENTRY);

		/* optionally generate a panic instead of performing a h/w reset */
		SDE_DBG_CTRL("stop_ftrace", "reset_hw_panic");
		@@ -3777,18 +3618,8 @@ static int _sde_crtc_reset_hw(struct drm_crtc *crtc,
		}
		}

		/*
		* Early out if simple ctl reset succeeded and previous commit
		* did not involve the rotator.
		*
		* If the previous commit had rotation enabled, then the ctl
		* reset would also have reset the rotator h/w. The rotator
		* programming for the current commit may need to be repeated,
		* depending on the rotation mode; don't handle this for now
		* and just force a hard reset in those cases.
		*/
		if (i == sde_crtc->num_ctls &&
		old_rot_op_mode == SDE_CTL_ROT_OP_MODE_OFFLINE)
		/* Early out if simple ctl reset succeeded */
		if (i == sde_crtc->num_ctls)
		return 0;

		SDE_DEBUG("crtc%d: issuing hard reset\n", DRMID(crtc));
		@@ -3813,26 +3644,7 @@ static int _sde_crtc_reset_hw(struct drm_crtc *crtc,
		sde_plane_set_revalidate(plane, true);
		}

		/* reset both previous... */
		drm_atomic_crtc_state_for_each_plane_state(plane, pstate, old_state) {
		if (pstate->crtc != crtc)
		continue;

		sde_plane_reset_rot(plane, (struct drm_plane_state *)pstate);
		}

		/* ...and current rotation attempts, if applicable */
		drm_atomic_crtc_for_each_plane(plane, crtc) {
		pstate = plane->state;
		if (!pstate)
		continue;

		sde_plane_reset_rot(plane, (struct drm_plane_state *)pstate);
		}

		/* provide safe "border color only" commit configuration for later */
		cstate->sbuf_cfg.rot_op_mode = SDE_CTL_ROT_OP_MODE_OFFLINE;
		_sde_crtc_commit_kickoff_rot(crtc, cstate);
		_sde_crtc_remove_pipe_flush(crtc);
		_sde_crtc_blend_setup(crtc, old_state, false);

		@@ -3870,61 +3682,6 @@ static int _sde_crtc_reset_hw(struct drm_crtc *crtc,
		return !recovery_events ? 0 : -EAGAIN;
		}

		/**
		* _sde_crtc_prepare_for_kickoff_rot - rotator related kickoff preparation
		* @dev: Pointer to drm device
		* @crtc: Pointer to crtc structure
		* Returns: true on preparation errors
		*/
		static bool _sde_crtc_prepare_for_kickoff_rot(struct drm_device *dev,
		struct drm_crtc *crtc)
		{
		struct drm_encoder *encoder;
		struct sde_crtc *sde_crtc;
		struct sde_crtc_state *cstate;

		if (!crtc \|\| !dev) {
		SDE_ERROR("invalid argument(s)\n");
		return false;
		}
		sde_crtc = to_sde_crtc(crtc);
		cstate = to_sde_crtc_state(crtc->state);

		/* default to ASYNC mode for inline rotation */
		cstate->sbuf_cfg.rot_op_mode = sde_crtc->sbuf_rot_id ?
		SDE_CTL_ROT_OP_MODE_INLINE_ASYNC : SDE_CTL_ROT_OP_MODE_OFFLINE;

		if (cstate->sbuf_cfg.rot_op_mode == SDE_CTL_ROT_OP_MODE_OFFLINE)
		return false;

		/* extra steps needed for inline ASYNC modes */
		list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
		if (encoder->crtc != crtc)
		continue;

		/*
		* For inline ASYNC modes, the flush bits are not written
		* to hardware atomically. This is not fully supported for
		* non-command mode encoders, so force SYNC mode if any
		* of them are attached to the CRTC.
		*/
		if (sde_encoder_get_intf_mode(encoder) != INTF_MODE_CMD) {
		cstate->sbuf_cfg.rot_op_mode =
		SDE_CTL_ROT_OP_MODE_INLINE_SYNC;
		return false;
		}
		}

		/*
		* For ASYNC inline modes, kick off the rotator now so that the H/W
		* can start as soon as it's ready.
		*/
		if (_sde_crtc_commit_kickoff_rot(crtc, cstate))
		return true;

		return false;
		}

		void sde_crtc_commit_kickoff(struct drm_crtc *crtc,
		struct drm_crtc_state *old_state)
		{
		@@ -3934,7 +3691,7 @@ void sde_crtc_commit_kickoff(struct drm_crtc *crtc,
		struct msm_drm_private *priv;
		struct sde_kms *sde_kms;
		struct sde_crtc_state *cstate;
		bool is_error, reset_req, recovery_events;
		bool is_error = false, reset_req, recovery_events;
		unsigned long flags;
		enum sde_crtc_idle_pc_state idle_pc_state;

		@@ -3965,8 +3722,6 @@ void sde_crtc_commit_kickoff(struct drm_crtc *crtc,

		SDE_ATRACE_BEGIN("crtc_commit");

		is_error = _sde_crtc_prepare_for_kickoff_rot(dev, crtc);

		idle_pc_state = sde_crtc_get_property(cstate, CRTC_PROP_IDLE_PC_STATE);

		list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
		@@ -3979,7 +3734,6 @@ void sde_crtc_commit_kickoff(struct drm_crtc *crtc,
		* Encoder will flush/start now, unless it has a tx pending.
		* If so, it may delay and flush at an irq event (e.g. ppdone)
		*/
		params.inline_rotate_prefill = cstate->sbuf_prefill_line;
		params.affected_displays = _sde_crtc_get_displays_affected(crtc,
		crtc->state);
		if (sde_encoder_prepare_for_kickoff(encoder, &params))
		@@ -4011,26 +3765,13 @@ void sde_crtc_commit_kickoff(struct drm_crtc *crtc,
		if (atomic_inc_return(&sde_crtc->frame_pending) == 1) {
		/* acquire bandwidth and other resources */
		SDE_DEBUG("crtc%d first commit\n", crtc->base.id);
		SDE_EVT32(DRMID(crtc), cstate->sbuf_cfg.rot_op_mode,
		SDE_EVTLOG_FUNC_CASE1);
		SDE_EVT32(DRMID(crtc), SDE_EVTLOG_FUNC_CASE1);
		} else {
		SDE_DEBUG("crtc%d commit\n", crtc->base.id);
		SDE_EVT32(DRMID(crtc), cstate->sbuf_cfg.rot_op_mode,
		SDE_EVTLOG_FUNC_CASE2);
		SDE_EVT32(DRMID(crtc), SDE_EVTLOG_FUNC_CASE2);
		}
		sde_crtc->play_count++;

		/*
		* For SYNC inline modes, delay the kick off until after the
		* wait for frame done in case the wait times out.
		*
		* Also perform a final kickoff when transitioning back to
		* offline mode.
		*/
		if (cstate->sbuf_cfg.rot_op_mode != SDE_CTL_ROT_OP_MODE_INLINE_ASYNC)
		if (_sde_crtc_commit_kickoff_rot(crtc, cstate))
		is_error = true;

		sde_vbif_clear_errors(sde_kms);

		if (is_error) {
		@@ -4204,9 +3945,6 @@ static struct drm_crtc_state sde_crtc_duplicate_state(struct drm_crtc crtc)
		/* clear destination scaler dirty bit */
		cstate->ds_dirty = false;

		/* record whether or not the sbuf_clk_rate fifo has been shifted */
		cstate->sbuf_clk_shifted = false;

		/* duplicate base helper */
		__drm_atomic_helper_crtc_duplicate_state(crtc, &cstate->base);

		@@ -4984,12 +4722,6 @@ static int sde_crtc_atomic_check(struct drm_crtc *crtc,
		_sde_crtc_setup_is_ppsplit(state);
		_sde_crtc_setup_lm_bounds(crtc, state);

		/* record current/previous sbuf clock rate for later */
		cstate->sbuf_clk_rate[0] = cstate->sbuf_clk_rate[1];
		cstate->sbuf_clk_rate[1] = sde_crtc_get_property(
		cstate, CRTC_PROP_ROT_CLK);
		cstate->sbuf_clk_shifted = true;

		/* get plane state for all drm planes associated with crtc state */
		drm_atomic_crtc_state_for_each_plane_state(plane, pstate, state) {
		if (IS_ERR_OR_NULL(pstate)) {
		@@ -4999,16 +4731,6 @@ static int sde_crtc_atomic_check(struct drm_crtc *crtc,
		goto end;
		}

		/* identify attached planes that are not in the delta state */
		if (!drm_atomic_get_existing_plane_state(state->state, plane)) {
		rc = sde_plane_confirm_hw_rsvps(plane, pstate, state);
		if (rc) {
		SDE_ERROR("crtc%d confirmation hw failed %d\n",
		crtc->base.id, rc);
		goto end;
		}
		}

		if (cnt >= SDE_PSTATES_MAX)
		continue;

drivers/gpu/drm/msm/sde/sde_crtc.h

+0 −58

Original line number	Diff line number	Diff line
		@@ -216,10 +216,6 @@ struct sde_crtc_fps_info {
		* @misr_enable : boolean entry indicates misr enable/disable status.
		* @misr_frame_count : misr frame count provided by client
		* @misr_data : store misr data before turning off the clocks.
		* @sbuf_op_mode_old : inline rotator op mode for previous commit cycle
		* @sbuf_rot_id : inline rotator block id for attached planes
		* @sbuf_rot_id_old: inline rotator id for previous commit
		* @sbuf_rot_id_delta: inline rotator id for current delta state
		* @idle_notify_work: delayed worker to notify idle timeout to user space
		* @power_event : registered power event handle
		* @cur_perf : current performance committed to clock/bandwidth driver
		@@ -285,10 +281,6 @@ struct sde_crtc {
		u32 misr_frame_count;
		u32 misr_data[CRTC_DUAL_MIXERS];

		u32 sbuf_op_mode_old;
		u32 sbuf_rot_id;
		u32 sbuf_rot_id_old;
		u32 sbuf_rot_id_delta;
		struct kthread_delayed_work idle_notify_work;

		struct sde_power_event *power_event;
		@@ -317,10 +309,6 @@ struct sde_crtc_res_ops {
		void (put)(void val);
		};

		/* crtc resource type (0x0-0xffff reserved for hw block type */
		#define SDE_CRTC_RES_ROT_PLANE 0x10000
		#define SDE_CRTC_RES_ROT_IN_FB 0x10001

		#define SDE_CRTC_RES_FLAG_FREE BIT(0)

		/**
		@@ -388,11 +376,6 @@ struct sde_crtc_respool {
		* @ds_cfg: Destination scaler config
		* @scl3_lut_cfg: QSEED3 lut config
		* @new_perf: new performance state being requested
		* @sbuf_cfg: stream buffer configuration
		* @sbuf_prefill_line: number of line for inline rotator prefetch
		* @sbuf_clk_rate : previous and current user specified inline rotator clock
		* @sbuf_clk_shifted : whether or not sbuf_clk_rate has been shifted as part
		* of crtc atomic check
		*/
		struct sde_crtc_state {
		struct drm_crtc_state base;
		@@ -422,10 +405,6 @@ struct sde_crtc_state {
		struct sde_hw_scaler3_lut_cfg scl3_lut_cfg;

		struct sde_core_perf_params new_perf;
		struct sde_ctl_sbuf_cfg sbuf_cfg;
		u32 sbuf_prefill_line;
		u64 sbuf_clk_rate[2];
		bool sbuf_clk_shifted;

		struct sde_crtc_respool rp;
		};
		@@ -505,19 +484,6 @@ static inline int sde_crtc_get_mixer_height(struct sde_crtc *sde_crtc,
		cstate->ds_cfg[0].lm_height : mode->vdisplay);
		}

		/**
		* sde_crtc_get_rotator_op_mode - get the rotator op mode from the crtc state
		* @crtc: Pointer to drm crtc object
		*/
		static inline enum sde_ctl_rot_op_mode sde_crtc_get_rotator_op_mode(
		struct drm_crtc *crtc)
		{
		if (!crtc \|\| !crtc->state)
		return SDE_CTL_ROT_OP_MODE_OFFLINE;

		return to_sde_crtc_state(crtc->state)->sbuf_cfg.rot_op_mode;
		}

		/**
		* sde_crtc_frame_pending - retun the number of pending frames
		* @crtc: Pointer to drm crtc object
		@@ -629,23 +595,6 @@ static inline bool sde_crtc_is_enabled(struct drm_crtc *crtc)
		return crtc ? crtc->enabled : false;
		}

		/**
		* sde_crtc_get_inline_prefill - get current inline rotation prefill
		* @crtc: Pointer to crtc
		* return: number of prefill lines
		*/
		static inline u32 sde_crtc_get_inline_prefill(struct drm_crtc *crtc)
		{
		struct sde_crtc_state *cstate;

		if (!crtc \|\| !crtc->state)
		return 0;

		cstate = to_sde_crtc_state(crtc->state);
		return cstate->sbuf_cfg.rot_op_mode != SDE_CTL_ROT_OP_MODE_OFFLINE ?
		cstate->sbuf_prefill_line : 0;
		}

		/**
		* sde_crtc_is_reset_required - validate the reset request based on the
		* pm_suspend and crtc's active status. crtc's are left active
		@@ -813,13 +762,6 @@ void sde_crtc_timeline_status(struct drm_crtc *crtc);
		void sde_crtc_update_cont_splash_settings(
		struct drm_crtc *crtc);

		/**
		* sde_crtc_get_sbuf_clk - get user specified sbuf clock settings
		* @state: Pointer to DRM crtc state object
		* Returns: Filtered sbuf clock setting from user space
		*/
		uint64_t sde_crtc_get_sbuf_clk(struct drm_crtc_state *state);

		/**
		* sde_crtc_misr_setup - to configure and enable/disable MISR
		* @crtc: Pointer to drm crtc structure

drivers/gpu/drm/msm/sde/sde_encoder.c

+8 −46

Original line number	Diff line number	Diff line
		@@ -1763,8 +1763,7 @@ static int _sde_encoder_switch_to_watchdog_vsync(struct drm_encoder *drm_enc)
		}

		static int _sde_encoder_update_rsc_client(
		struct drm_encoder *drm_enc,
		struct sde_encoder_rsc_config *config, bool enable)
		struct drm_encoder *drm_enc, bool enable)
		{
		struct sde_encoder_virt *sde_enc;
		struct drm_crtc *crtc;
		@@ -1836,8 +1835,7 @@ static int _sde_encoder_update_rsc_client(

		SDE_EVT32(rsc_state, qsync_mode);

		prefill_lines = config ? mode_info.prefill_lines +
		config->inline_rotate_prefill : mode_info.prefill_lines;
		prefill_lines = mode_info.prefill_lines;

		/* compare specific items and reconfigure the rsc */
		if ((rsc_config->fps != mode_info.frame_rate) \|\|
		@@ -2014,32 +2012,6 @@ struct sde_rsc_client sde_encoder_get_rsc_client(struct drm_encoder drm_enc)
		return sde_enc->rsc_client;
		}

		static void _sde_encoder_resource_control_rsc_update(
		struct drm_encoder *drm_enc, bool enable)
		{
		struct sde_encoder_rsc_config rsc_cfg = { 0 };
		struct sde_encoder_virt *sde_enc;

		if (!drm_enc) {
		SDE_ERROR("invalid encoder argument\n");
		return;
		}
		sde_enc = to_sde_encoder_virt(drm_enc);
		if (!sde_enc->crtc) {
		SDE_ERROR("invalid crtc\n");
		return;
		}

		if (enable) {
		rsc_cfg.inline_rotate_prefill =
		sde_crtc_get_inline_prefill(sde_enc->crtc);

		_sde_encoder_update_rsc_client(drm_enc, &rsc_cfg, true);
		} else {
		_sde_encoder_update_rsc_client(drm_enc, NULL, false);
		}
		}

		static int _sde_encoder_resource_control_helper(struct drm_encoder *drm_enc,
		bool enable)
		{
		@@ -2251,7 +2223,7 @@ static int sde_encoder_resource_control(struct drm_encoder *drm_enc,
		return ret;
		}

		_sde_encoder_resource_control_rsc_update(drm_enc, true);
		_sde_encoder_update_rsc_client(drm_enc, true);
		}

		SDE_EVT32(DRMID(drm_enc), sw_event, sde_enc->rc_state,
		@@ -2358,7 +2330,7 @@ static int sde_encoder_resource_control(struct drm_encoder *drm_enc,
		* IRQs are still enabled currently, which allows wait for
		* VBLANK which RSC may require to correctly transition to OFF
		*/
		_sde_encoder_resource_control_rsc_update(drm_enc, false);
		_sde_encoder_update_rsc_client(drm_enc, false);

		SDE_EVT32(DRMID(drm_enc), sw_event, sde_enc->rc_state,
		SDE_ENC_RC_STATE_PRE_OFF,
		@@ -2434,7 +2406,7 @@ static int sde_encoder_resource_control(struct drm_encoder *drm_enc,
		return ret;
		}

		_sde_encoder_resource_control_rsc_update(drm_enc, true);
		_sde_encoder_update_rsc_client(drm_enc, true);

		SDE_EVT32(DRMID(drm_enc), sw_event, sde_enc->rc_state,
		SDE_ENC_RC_STATE_ON, SDE_EVTLOG_FUNC_CASE5);
		@@ -2479,7 +2451,7 @@ static int sde_encoder_resource_control(struct drm_encoder *drm_enc,
		_sde_encoder_modeset_helper_locked(drm_enc, sw_event);
		_sde_encoder_irq_control(drm_enc, true);

		_sde_encoder_update_rsc_client(drm_enc, NULL, true);
		_sde_encoder_update_rsc_client(drm_enc, true);

		SDE_EVT32(DRMID(drm_enc), sw_event, sde_enc->rc_state,
		SDE_ENC_RC_STATE_ON, SDE_EVTLOG_FUNC_CASE6);
		@@ -2519,8 +2491,7 @@ static int sde_encoder_resource_control(struct drm_encoder *drm_enc,
		_sde_encoder_irq_control(drm_enc, false);
		} else {
		/* disable all the clks and resources */
		_sde_encoder_resource_control_rsc_update(drm_enc,
		false);
		_sde_encoder_update_rsc_client(drm_enc, false);
		_sde_encoder_resource_control_helper(drm_enc, false);
		}

		@@ -2578,7 +2549,7 @@ static int sde_encoder_resource_control(struct drm_encoder *drm_enc,
		return ret;
		}

		_sde_encoder_resource_control_rsc_update(drm_enc, true);
		_sde_encoder_update_rsc_client(drm_enc, true);

		/*
		* In some cases, commit comes with slight delay
		@@ -3569,15 +3540,6 @@ static inline void _sde_encoder_trigger_start(struct sde_encoder_phys *phys)
		return;
		}

		/* Start rotator before CTL_START for async inline mode */
		if (sde_crtc_get_rotator_op_mode(sde_enc->crtc) ==
		SDE_CTL_ROT_OP_MODE_INLINE_ASYNC &&
		ctl->ops.trigger_rot_start) {
		SDE_DEBUG_ENC(sde_enc, "trigger rotator start ctl%d\n",
		ctl->idx - CTL_0);
		ctl->ops.trigger_rot_start(ctl);
		}

		if (phys->ops.trigger_start && phys->enable_state != SDE_ENC_DISABLED)
		phys->ops.trigger_start(phys);
		}

drivers/gpu/drm/msm/sde/sde_encoder.h

+0 −10

Original line number	Diff line number	Diff line
		@@ -54,27 +54,17 @@ struct sde_encoder_hw_resources {

		/**
		* sde_encoder_kickoff_params - info encoder requires at kickoff
		* @inline_rotate_prefill: number of lines to prefill for inline rotation
		* @is_primary: set to true if the display is primary display
		* @affected_displays: bitmask, bit set means the ROI of the commit lies within
		* the bounds of the physical display at the bit index
		* @recovery_events_enabled: indicates status of client for recoovery events
		*/
		struct sde_encoder_kickoff_params {
		u32 inline_rotate_prefill;
		u32 is_primary;
		unsigned long affected_displays;
		bool recovery_events_enabled;
		};

		/**
		* sde_encoder_rsc_config - rsc configuration for encoder
		* @inline_rotate_prefill: number of lines to prefill for inline rotation
		*/
		struct sde_encoder_rsc_config {
		u32 inline_rotate_prefill;
		};

		/**
		* sde_encoder_get_hw_resources - Populate table of required hardware resources
		* @encoder: encoder pointer