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Commit ca84a233 authored by Vincenzo Frascino's avatar Vincenzo Frascino Committed by Alistair Delva
Browse files

BACKPORT: mips: vdso: Enable mips to use common headers 



Enable mips to use only the common headers in the implementation of
the vDSO library.

Signed-off-by: default avatarVincenzo Frascino <vincenzo.frascino@arm.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: Paul Burton <paulburton@kernel.org>
Link: https://lkml.kernel.org/r/20200320145351.32292-23-vincenzo.frascino@arm.com


(cherry picked from commit c135fc875ce363ff8405a8e64408bca0aa2a865b)
Signed-off-by: default avatarMark Salyzyn <salyzyn@google.com>
Bug: 154668398
Change-Id: I80936b5fbd4a2a7e0b7b2af29f4570129f02f678
parent 6f0068f4

arch/mips/include/asm/processor.h

+1 −15
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
#include <asm/dsemul.h>

#include <asm/mipsregs.h>

#include <asm/prefetch.h>

#include <asm/vdso/processor.h>



/*

 * Return current * instruction pointer ("program counter").
@@ -386,21 +387,6 @@ unsigned long get_wchan(struct task_struct *p); 
#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29])

#define KSTK_STATUS(tsk) (task_pt_regs(tsk)->cp0_status)



#ifdef CONFIG_CPU_LOONGSON3

/*

 * Loongson-3's SFB (Store-Fill-Buffer) may buffer writes indefinitely when a

 * tight read loop is executed, because reads take priority over writes & the

 * hardware (incorrectly) doesn't ensure that writes will eventually occur.

 *

 * Since spin loops of any kind should have a cpu_relax() in them, force an SFB

 * flush from cpu_relax() such that any pending writes will become visible as

 * expected.

 */

#define cpu_relax()	smp_mb()

#else

#define cpu_relax()	barrier()

#endif



/*

 * Return_address is a replacement for __builtin_return_address(count)

 * which on certain architectures cannot reasonably be implemented in GCC

arch/mips/include/asm/vdso/gettimeofday.h

+0 −4
Original line number Diff line number Diff line
@@ -13,12 +13,8 @@ 


#ifndef __ASSEMBLY__



#include <linux/compiler.h>

#include <linux/time.h>



#include <asm/vdso/vdso.h>

#include <asm/clocksource.h>

#include <asm/io.h>

#include <asm/unistd.h>

#include <asm/vdso.h>

arch/mips/include/asm/vdso/processor.h

0 → 100644
+27 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (C) 2020 ARM Ltd.

 */

#ifndef __ASM_VDSO_PROCESSOR_H

#define __ASM_VDSO_PROCESSOR_H



#ifndef __ASSEMBLY__



#ifdef CONFIG_CPU_LOONGSON64

/*

 * Loongson-3's SFB (Store-Fill-Buffer) may buffer writes indefinitely when a

 * tight read loop is executed, because reads take priority over writes & the

 * hardware (incorrectly) doesn't ensure that writes will eventually occur.

 *

 * Since spin loops of any kind should have a cpu_relax() in them, force an SFB

 * flush from cpu_relax() such that any pending writes will become visible as

 * expected.

 */

#define cpu_relax()	smp_mb()

#else

#define cpu_relax()	barrier()

#endif



#endif /* __ASSEMBLY__ */



#endif /* __ASM_VDSO_PROCESSOR_H */