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Commit ca833fc0 authored by Santosh Mardi's avatar Santosh Mardi
Browse files

ARM: dts: msm: move DCVS nodes from to soc nodes 

Move DCVS nodes used for monitoring ddr traffic from vdac node
to soc node for scuba target.

Change-Id: Iaffb70cb23a347cdab2db00b91d42f20e348496c
parent b37d5078

qcom/scuba.dtsi

+119 −119
Original line number Diff line number Diff line
@@ -1218,6 +1218,125 @@ 
		#freq-domain-cells = <2>;

	};



	ddr_bw_opp_table: ddr-bw-opp-table {

		compatible = "operating-points-v2";

		BW_OPP_ENTRY_DDR( 200, 8, 0xA0); /* 1525 MB/s */

		BW_OPP_ENTRY_DDR( 300, 8, 0xA0); /* 2288 MB/s */

		BW_OPP_ENTRY_DDR( 451, 8, 0xA0); /* 3440 MB/s */

		BW_OPP_ENTRY_DDR( 547, 8, 0xA0); /* 4173 MB/s */

		BW_OPP_ENTRY_DDR( 681, 8, 0xA0); /* 5195 MB/s */

		BW_OPP_ENTRY_DDR( 768, 8, 0xA0); /* 5859 MB/s */

		BW_OPP_ENTRY_DDR( 931, 8, 0x20); /* 7102 MB/s */

		BW_OPP_ENTRY_DDR(1017, 8, 0x80); /* 7759 MB/s */

		BW_OPP_ENTRY_DDR(1353, 8, 0x80); /*10322 MB/s */

		BW_OPP_ENTRY_DDR(1555, 8, 0x80); /*11863 MB/s */

		BW_OPP_ENTRY_DDR(1804, 8, 0x80); /*13763 MB/s */

	};



	suspendable_ddr_bw_opp_table: suspendable-ddr-bw-opp-table {

		compatible = "operating-points-v2";

		BW_OPP_ENTRY_DDR(   0, 8, 0xA0); /*    0 MB/s */

		BW_OPP_ENTRY_DDR( 200, 8, 0xA0); /* 1525 MB/s */

		BW_OPP_ENTRY_DDR( 300, 8, 0xA0); /* 2288 MB/s */

		BW_OPP_ENTRY_DDR( 451, 8, 0xA0); /* 3440 MB/s */

		BW_OPP_ENTRY_DDR( 547, 8, 0xA0); /* 4173 MB/s */

		BW_OPP_ENTRY_DDR( 681, 8, 0xA0); /* 5195 MB/s */

		BW_OPP_ENTRY_DDR( 768, 8, 0xA0); /* 5859 MB/s */

		BW_OPP_ENTRY_DDR( 931, 8, 0x20); /* 7102 MB/s */

		BW_OPP_ENTRY_DDR(1017, 8, 0x80); /* 7759 MB/s */

		BW_OPP_ENTRY_DDR(1353, 8, 0x80); /*10322 MB/s */

		BW_OPP_ENTRY_DDR(1555, 8, 0x80); /*11863 MB/s */

		BW_OPP_ENTRY_DDR(1804, 8, 0x80); /*13763 MB/s */

	};



	cpu_cpu_ddr_bw: qcom,cpu-cpu-ddr-bw {

		compatible = "qcom,devbw-ddr";

		governor = "performance";

		qcom,src-dst-ports =

			<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>;

		qcom,active-only;

		operating-points-v2 = <&ddr_bw_opp_table>;

	};



	cpu_cpu_ddr_bwmon: qcom,cpu-cpu-ddr-bwmon@01b8e200 {

		compatible = "qcom,bimc-bwmon4";

		reg = <0x01b8e300 0x100>, <0x01b8e200 0x100>;

		reg-names = "base", "global_base";

		interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>;

		qcom,mport = <0>;

		qcom,hw-timer-hz = <19200000>;

		qcom,target-dev = <&cpu_cpu_ddr_bw>;

		qcom,count-unit = <0x10000>;

	};



	cpu0_cpu_ddr_latfloor: qcom,cpu0-cpu-ddr-latfloor {

		compatible = "qcom,devbw-ddr";

		governor = "performance";

		qcom,src-dst-ports =

			<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>;

		qcom,active-only;

		operating-points-v2 = <&ddr_bw_opp_table>;

	};



	cpu0_cpu_ddr_lat: qcom,cpu0-cpu-ddr-lat {

		compatible = "qcom,devbw-ddr";

		governor = "performance";

		qcom,src-dst-ports =

			<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>;

		qcom,active-only;

		operating-points-v2 = <&ddr_bw_opp_table>;

	};



	cpu0_memlat_cpugrp: qcom,cpu0-cpugrp {

		compatible = "qcom,arm-memlat-cpugrp";

		qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>;



		cpu0_cpu_ddr_latmon: qcom,cpu0-cpu-ddr-latmon {

			compatible = "qcom,arm-memlat-mon";

			qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>;

			qcom,target-dev = <&cpu0_cpu_ddr_lat>;

			qcom,cachemiss-ev = <0x17>;

			ddr3-map {

				qcom,ddr-type = <DDR_TYPE_LPDDR3>;

				qcom,core-dev-table =

					<  864000 MHZ_TO_MBPS(200, 8) >,

					< 1305600 MHZ_TO_MBPS(451, 8) >,

					< 1804800 MHZ_TO_MBPS(768, 8) >;

			};



			ddr4-map {

				qcom,ddr-type = <DDR_TYPE_LPDDR4X>;

				qcom,core-dev-table =

					<  864000 MHZ_TO_MBPS( 300, 8) >,

					< 1305600 MHZ_TO_MBPS( 547, 8) >,

					< 1420000 MHZ_TO_MBPS( 768, 8) >,

					< 1804800 MHZ_TO_MBPS(1017, 8) >;

			};

		};



		cpu0_computemon: qcom,cpu0-computemon {

			compatible = "qcom,arm-compute-mon";

			qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>;

			qcom,target-dev = <&cpu0_cpu_ddr_latfloor>;

			ddr3-map {

				qcom,ddr-type = <DDR_TYPE_LPDDR3>;

				qcom,core-dev-table =

					<  614400 MHZ_TO_MBPS( 200, 8) >,

					< 1305600 MHZ_TO_MBPS( 451, 8) >,

					< 1804800 MHZ_TO_MBPS( 768, 8) >;

			};



			ddr4-map {

				qcom,ddr-type = <DDR_TYPE_LPDDR4X>;

				qcom,core-dev-table =

					<  614400 MHZ_TO_MBPS( 300, 8) >,

					< 1017600 MHZ_TO_MBPS( 451, 8) >,

					< 1420000 MHZ_TO_MBPS( 547, 8) >,

					< 1804800 MHZ_TO_MBPS( 768, 8) >;

			};

		};

	};



	tcsr_mutex_block: syscon@00340000 {

		compatible = "syscon";

		reg = <0x340000 0x20000>;
@@ -1710,125 +1829,6 @@ 
		qcom,hw-settle-time = <200>;

		qcom,pre-scaling = <1 1>;

	};



	ddr_bw_opp_table: ddr-bw-opp-table {

		compatible = "operating-points-v2";

		BW_OPP_ENTRY_DDR( 200, 8, 0xA0); /* 1525 MB/s */

		BW_OPP_ENTRY_DDR( 300, 8, 0xA0); /* 2288 MB/s */

		BW_OPP_ENTRY_DDR( 451, 8, 0xA0); /* 3440 MB/s */

		BW_OPP_ENTRY_DDR( 547, 8, 0xA0); /* 4173 MB/s */

		BW_OPP_ENTRY_DDR( 681, 8, 0xA0); /* 5195 MB/s */

		BW_OPP_ENTRY_DDR( 768, 8, 0xA0); /* 5859 MB/s */

		BW_OPP_ENTRY_DDR( 931, 8, 0x20); /* 7102 MB/s */

		BW_OPP_ENTRY_DDR(1017, 8, 0x80); /* 7759 MB/s */

		BW_OPP_ENTRY_DDR(1353, 8, 0x80); /*10322 MB/s */

		BW_OPP_ENTRY_DDR(1555, 8, 0x80); /*11863 MB/s */

		BW_OPP_ENTRY_DDR(1804, 8, 0x80); /*13763 MB/s */

	};



	suspendable_ddr_bw_opp_table: suspendable-ddr-bw-opp-table {

		compatible = "operating-points-v2";

		BW_OPP_ENTRY_DDR(   0, 8, 0xA0); /*    0 MB/s */

		BW_OPP_ENTRY_DDR( 200, 8, 0xA0); /* 1525 MB/s */

		BW_OPP_ENTRY_DDR( 300, 8, 0xA0); /* 2288 MB/s */

		BW_OPP_ENTRY_DDR( 451, 8, 0xA0); /* 3440 MB/s */

		BW_OPP_ENTRY_DDR( 547, 8, 0xA0); /* 4173 MB/s */

		BW_OPP_ENTRY_DDR( 681, 8, 0xA0); /* 5195 MB/s */

		BW_OPP_ENTRY_DDR( 768, 8, 0xA0); /* 5859 MB/s */

		BW_OPP_ENTRY_DDR( 931, 8, 0x20); /* 7102 MB/s */

		BW_OPP_ENTRY_DDR(1017, 8, 0x80); /* 7759 MB/s */

		BW_OPP_ENTRY_DDR(1353, 8, 0x80); /*10322 MB/s */

		BW_OPP_ENTRY_DDR(1555, 8, 0x80); /*11863 MB/s */

		BW_OPP_ENTRY_DDR(1804, 8, 0x80); /*13763 MB/s */

	};



	cpu_cpu_ddr_bw: qcom,cpu-cpu-ddr-bw {

		compatible = "qcom,devbw-ddr";

		governor = "performance";

		qcom,src-dst-ports =

			<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>;

		qcom,active-only;

		operating-points-v2 = <&ddr_bw_opp_table>;

	};



	cpu_cpu_ddr_bwmon: qcom,cpu-cpu-ddr-bwmon@01b8e200 {

		compatible = "qcom,bimc-bwmon4";

		reg = <0x01b8e300 0x100>, <0x01b8e200 0x100>;

		reg-names = "base", "global_base";

		interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>;

		qcom,mport = <0>;

		qcom,hw-timer-hz = <19200000>;

		qcom,target-dev = <&cpu_cpu_ddr_bw>;

		qcom,count-unit = <0x10000>;

	};



	cpu0_cpu_ddr_latfloor: qcom,cpu0-cpu-ddr-latfloor {

		compatible = "qcom,devbw-ddr";

		governor = "performance";

		qcom,src-dst-ports =

			<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>;

		qcom,active-only;

		operating-points-v2 = <&ddr_bw_opp_table>;

	};



	cpu0_cpu_ddr_lat: qcom,cpu0-cpu-ddr-lat {

		compatible = "qcom,devbw-ddr";

		governor = "performance";

		qcom,src-dst-ports =

			<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>;

		qcom,active-only;

		operating-points-v2 = <&ddr_bw_opp_table>;

	};



	cpu0_memlat_cpugrp: qcom,cpu0-cpugrp {

		compatible = "qcom,arm-memlat-cpugrp";

		qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>;



		cpu0_cpu_ddr_latmon: qcom,cpu0-cpu-ddr-latmon {

			compatible = "qcom,arm-memlat-mon";

			qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>;

			qcom,target-dev = <&cpu0_cpu_ddr_lat>;

			qcom,cachemiss-ev = <0x17>;

			ddr3-map {

				qcom,ddr-type = <DDR_TYPE_LPDDR3>;

				qcom,core-dev-table =

					<  864000 MHZ_TO_MBPS(200, 8) >,

					< 1305600 MHZ_TO_MBPS(451, 8) >,

					< 1804800 MHZ_TO_MBPS(768, 8) >;

			};



			ddr4-map {

				qcom,ddr-type = <DDR_TYPE_LPDDR4X>;

				qcom,core-dev-table =

					<  864000 MHZ_TO_MBPS( 300, 8) >,

					< 1305600 MHZ_TO_MBPS( 547, 8) >,

					< 1420000 MHZ_TO_MBPS( 768, 8) >,

					< 1804800 MHZ_TO_MBPS(1017, 8) >;

			};

		};



		cpu0_computemon: qcom,cpu0-computemon {

			compatible = "qcom,arm-compute-mon";

			qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>;

			qcom,target-dev = <&cpu0_cpu_ddr_latfloor>;

			ddr3-map {

				qcom,ddr-type = <DDR_TYPE_LPDDR3>;

				qcom,core-dev-table =

					<  614400 MHZ_TO_MBPS( 200, 8) >,

					< 1305600 MHZ_TO_MBPS( 451, 8) >,

					< 1804800 MHZ_TO_MBPS( 768, 8) >;

			};



			ddr4-map {

				qcom,ddr-type = <DDR_TYPE_LPDDR4X>;

				qcom,core-dev-table =

					<  614400 MHZ_TO_MBPS( 300, 8) >,

					< 1017600 MHZ_TO_MBPS( 451, 8) >,

					< 1420000 MHZ_TO_MBPS( 547, 8) >,

					< 1804800 MHZ_TO_MBPS( 768, 8) >;

			};

		};

	};

};



&pm2250_gpios {