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Commit ca60dfbb authored by Sheng Yang's avatar Sheng Yang Committed by Avi Kivity
Browse files

KVM: VMX: Rename misnamed msr bits 



MSR_IA32_FEATURE_LOCKED is just a bit in fact, which shouldn't be prefixed with
MSR_.  So is MSR_IA32_FEATURE_VMXON_ENABLED.

Signed-off-by: default avatarSheng Yang <sheng.yang@intel.com>
Signed-off-by: default avatarAvi Kivity <avi@qumranet.com>
parent 278429cf

arch/x86/kvm/vmx.c

+9 −9
Original line number Diff line number Diff line
@@ -1031,9 +1031,9 @@ static __init int vmx_disabled_by_bios(void) 
	u64 msr;



	rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);

	return (msr & (MSR_IA32_FEATURE_CONTROL_LOCKED |

		       MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))

	    == MSR_IA32_FEATURE_CONTROL_LOCKED;

	return (msr & (IA32_FEATURE_CONTROL_LOCKED_BIT |

		       IA32_FEATURE_CONTROL_VMXON_ENABLED_BIT))

	    == IA32_FEATURE_CONTROL_LOCKED_BIT;

	/* locked but not enabled */

}
@@ -1045,14 +1045,14 @@ static void hardware_enable(void *garbage) 


	INIT_LIST_HEAD(&per_cpu(vcpus_on_cpu, cpu));

	rdmsrl(MSR_IA32_FEATURE_CONTROL, old);

	if ((old & (MSR_IA32_FEATURE_CONTROL_LOCKED |

		    MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))

	    != (MSR_IA32_FEATURE_CONTROL_LOCKED |

		MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))

	if ((old & (IA32_FEATURE_CONTROL_LOCKED_BIT |

		    IA32_FEATURE_CONTROL_VMXON_ENABLED_BIT))

	    != (IA32_FEATURE_CONTROL_LOCKED_BIT |

		IA32_FEATURE_CONTROL_VMXON_ENABLED_BIT))

		/* enable and lock */

		wrmsrl(MSR_IA32_FEATURE_CONTROL, old |

		       MSR_IA32_FEATURE_CONTROL_LOCKED |

		       MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED);

		       IA32_FEATURE_CONTROL_LOCKED_BIT |

		       IA32_FEATURE_CONTROL_VMXON_ENABLED_BIT);

	write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */

	asm volatile (ASM_VMX_VMXON_RAX

		      : : "a"(&phys_addr), "m"(phys_addr)

arch/x86/kvm/vmx.h

+2 −2
Original line number Diff line number Diff line
@@ -331,8 +331,8 @@ enum vmcs_field { 


#define AR_RESERVD_MASK 0xfffe0f00



#define MSR_IA32_FEATURE_CONTROL_LOCKED         0x1

#define MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED  0x4

#define IA32_FEATURE_CONTROL_LOCKED_BIT		0x1

#define IA32_FEATURE_CONTROL_VMXON_ENABLED_BIT	0x4



#define APIC_ACCESS_PAGE_PRIVATE_MEMSLOT	9

#define IDENTITY_PAGETABLE_PRIVATE_MEMSLOT	10