Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ca02954a authored by Amelie Delaunay's avatar Amelie Delaunay Committed by Felipe Balbi
Browse files

usb: dwc2: gadget: Fix GUSBCFG.USBTRDTIM value 



USBTrdTim must be programmed to 0x5 when phy has a UTMI+ 16-bit wide
interface or 0x9 when it has a 8-bit wide interface.
GUSBCFG reset value (Value After Reset: 0x1400) sets USBTrdTim to 0x5.
In case of 8-bit UTMI+, without clearing GUSBCFG.USBTRDTIM mask, USBTrdTim
results in 0xD (0x5 | 0x9).
That's why we need to clear GUSBCFG.USBTRDTIM mask before setting USBTrdTim
value, to ensure USBTrdTim is correctly set in case of 8-bit UTMI+.

Signed-off-by: default avatarAmelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
parent 32856eea

drivers/usb/dwc2/gadget.c

+2 −2
Original line number Diff line number Diff line
@@ -3169,7 +3169,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg, 
	/* keep other bits untouched (so e.g. forced modes are not lost) */

	usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);

	usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |

		GUSBCFG_HNPCAP);

		GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK);



	if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS &&

	    (hsotg->params.speed == DWC2_SPEED_PARAM_FULL ||
@@ -4123,7 +4123,7 @@ static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg) 
	/* keep other bits untouched (so e.g. forced modes are not lost) */

	usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);

	usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |

		GUSBCFG_HNPCAP);

		GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK);



	/* set the PLL on, remove the HNP/SRP and set the PHY */

	trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;