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Commit c9a0ebcf authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add CTI config for ETB and ETR for lagoon"

parents 8d52aa94 0764dc13

qcom/lagoon-coresight.dtsi

+2 −0
Original line number Original line Diff line number Diff line
@@ -2187,6 +2187,7 @@ 
		reg-names = "tmc-base";

		reg-names = "tmc-base";





		coresight-name = "coresight-tmc-etf";

		coresight-name = "coresight-tmc-etf";

		coresight-ctis = <&cti_swao_cti0 &cti_swao_cti3>;

		coresight-csr = <&swao_csr>;

		coresight-csr = <&swao_csr>;





		clocks = <&aopcc QDSS_CLK>;

		clocks = <&aopcc QDSS_CLK>;
@@ -2298,6 +2299,7 @@ 




		qcom,sw-usb;

		qcom,sw-usb;

		coresight-name = "coresight-tmc-etr";

		coresight-name = "coresight-tmc-etr";

		coresight-ctis = <&cti0 &cti_swao_cti3>;

		coresight-csr = <&csr>;

		coresight-csr = <&csr>;





		interrupts = <GIC_SPI 270 IRQ_TYPE_EDGE_RISING>;

		interrupts = <GIC_SPI 270 IRQ_TYPE_EDGE_RISING>;