sparc64: separate extable_64.h, switch elf_64.h to it (c99d2abd) · Commits · e / devices / android_kernel_fairphone_FP4

arch/sparc/include/asm/elf_64.h

+1 −1

0 → 100644

+20 −0

Original line number	Diff line number	Diff line
		#ifndef __ASM_EXTABLE64_H
		#define __ASM_EXTABLE64_H
		/*
		* The exception table consists of pairs of addresses: the first is the
		* address of an instruction that is allowed to fault, and the second is
		* the address at which the program should continue. No registers are
		* modified, so it is entirely up to the continuation code to figure out
		* what to do.
		*
		* All the routines below use bits of fixup code that are out of line
		* with the main instruction path. This means when everything is well,
		* we don't even have to jump over them. Further, they do not intrude
		* on our cache or tlb entries.
		*/

		struct exception_table_entry {
		unsigned int insn, fixup;
		};

		#endif

+1 −17

Original line number	Diff line number	Diff line
		@@ -13,6 +13,7 @@
		#include <asm/asi.h>
		#include <asm/spitfire.h>
		#include <asm-generic/uaccess-unaligned.h>
		#include <asm/extable_64.h>
		#endif

		#ifndef __ASSEMBLY__
		@@ -81,23 +82,6 @@ static inline int access_ok(int type, const void __user * addr, unsigned long si
		return 1;
		}

		/*
		* The exception table consists of pairs of addresses: the first is the
		* address of an instruction that is allowed to fault, and the second is
		* the address at which the program should continue. No registers are
		* modified, so it is entirely up to the continuation code to figure out
		* what to do.
		*
		* All the routines below use bits of fixup code that are out of line
		* with the main instruction path. This means when everything is well,
		* we don't even have to jump over them. Further, they do not intrude
		* on our cache or tlb entries.
		*/

		struct exception_table_entry {
		unsigned int insn, fixup;
		};

		void __ret_efault(void);
		void __retl_efault(void);