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Commit c979dfc0 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
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Merge 4.19.211 into android-4.19-stable



Changes in 4.19.211
	Partially revert "usb: Kconfig: using select for USB_COMMON dependency"
	USB: cdc-acm: fix racy tty buffer accesses
	USB: cdc-acm: fix break reporting
	xen/privcmd: fix error handling in mmap-resource processing
	ovl: fix missing negative dentry check in ovl_rename()
	nfsd4: Handle the NFSv4 READDIR 'dircount' hint being zero
	xen/balloon: fix cancelled balloon action
	ARM: dts: omap3430-sdp: Fix NAND device node
	ARM: dts: qcom: apq8064: use compatible which contains chipid
	bpf, mips: Validate conditional branch offsets
	xtensa: call irqchip_init only when CONFIG_USE_OF is selected
	bpf, arm: Fix register clobbering in div/mod implementation
	bpf: Fix integer overflow in prealloc_elems_and_freelist()
	phy: mdio: fix memory leak
	net_sched: fix NULL deref in fifo_set_limit()
	powerpc/fsl/dts: Fix phy-connection-type for fm1mac3
	ptp_pch: Load module automatically if ID matches
	ARM: imx6: disable the GIC CPU interface before calling stby-poweroff sequence
	net: bridge: use nla_total_size_64bit() in br_get_linkxstats_size()
	net: sfp: Fix typo in state machine debug string
	netlink: annotate data races around nlk->bound
	drm/nouveau/debugfs: fix file release memory leak
	rtnetlink: fix if_nlmsg_stats_size() under estimation
	i40e: fix endless loop under rtnl
	i40e: Fix freeing of uninitialized misc IRQ vector
	i2c: acpi: fix resource leak in reconfiguration device addition
	x86/Kconfig: Correct reference to MWINCHIP3D
	Linux 4.19.211

Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@google.com>
Change-Id: I83fabc26b9b5528ffcad45ccc55afa07a4656d53
parents b519e868 3f8a27f9
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+1 −1
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0
VERSION = 4
PATCHLEVEL = 19
SUBLEVEL = 210
SUBLEVEL = 211
EXTRAVERSION =
NAME = "People's Front"

+1 −1
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@@ -104,7 +104,7 @@

	nand@1,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		reg = <1 0 4>; /* CS1, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
+1 −2
Original line number Diff line number Diff line
@@ -1182,7 +1182,7 @@
		};

		gpu: adreno-3xx@4300000 {
			compatible = "qcom,adreno-3xx";
			compatible = "qcom,adreno-320.2", "qcom,adreno";
			reg = <0x04300000 0x20000>;
			reg-names = "kgsl_3d0_reg_memory";
			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
@@ -1197,7 +1197,6 @@
			    <&mmcc GFX3D_AHB_CLK>,
			    <&mmcc GFX3D_AXI_CLK>,
			    <&mmcc MMSS_IMEM_AHB_CLK>;
			qcom,chipid = <0x03020002>;

			iommus = <&gfx3d 0
				  &gfx3d 1
+2 −0
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@@ -15,6 +15,7 @@
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/genalloc.h>
#include <linux/irqchip/arm-gic.h>
#include <linux/mfd/syscon.h>
#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
#include <linux/of.h>
@@ -622,6 +623,7 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata

static void imx6_pm_stby_poweroff(void)
{
	gic_cpu_if_down(0);
	imx6_set_lpm(STOP_POWER_OFF);
	imx6q_suspend_finish(0);

+19 −0
Original line number Diff line number Diff line
@@ -39,6 +39,10 @@
 *                        +-----+
 *                        |RSVD | JIT scratchpad
 * current ARM_SP =>      +-----+ <= (BPF_FP - STACK_SIZE + SCRATCH_SIZE)
 *                        | ... | caller-saved registers
 *                        +-----+
 *                        | ... | arguments passed on stack
 * ARM_SP during call =>  +-----|
 *                        |     |
 *                        | ... | Function call stack
 *                        |     |
@@ -66,6 +70,12 @@
 *
 * When popping registers off the stack at the end of a BPF function, we
 * reference them via the current ARM_FP register.
 *
 * Some eBPF operations are implemented via a call to a helper function.
 * Such calls are "invisible" in the eBPF code, so it is up to the calling
 * program to preserve any caller-saved ARM registers during the call. The
 * JIT emits code to push and pop those registers onto the stack, immediately
 * above the callee stack frame.
 */
#define CALLEE_MASK	(1 << ARM_R4 | 1 << ARM_R5 | 1 << ARM_R6 | \
			 1 << ARM_R7 | 1 << ARM_R8 | 1 << ARM_R9 | \
@@ -73,6 +83,8 @@
#define CALLEE_PUSH_MASK (CALLEE_MASK | 1 << ARM_LR)
#define CALLEE_POP_MASK  (CALLEE_MASK | 1 << ARM_PC)

#define CALLER_MASK	(1 << ARM_R0 | 1 << ARM_R1 | 1 << ARM_R2 | 1 << ARM_R3)

enum {
	/* Stack layout - these are offsets from (top of stack - 4) */
	BPF_R2_HI,
@@ -467,6 +479,7 @@ static inline int epilogue_offset(const struct jit_ctx *ctx)

static inline void emit_udivmod(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx, u8 op)
{
	const int exclude_mask = BIT(ARM_R0) | BIT(ARM_R1);
	const s8 *tmp = bpf2a32[TMP_REG_1];

#if __LINUX_ARM_ARCH__ == 7
@@ -498,11 +511,17 @@ static inline void emit_udivmod(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx, u8 op)
		emit(ARM_MOV_R(ARM_R0, rm), ctx);
	}

	/* Push caller-saved registers on stack */
	emit(ARM_PUSH(CALLER_MASK & ~exclude_mask), ctx);

	/* Call appropriate function */
	emit_mov_i(ARM_IP, op == BPF_DIV ?
		   (u32)jit_udiv32 : (u32)jit_mod32, ctx);
	emit_blx_r(ARM_IP, ctx);

	/* Restore caller-saved registers from stack */
	emit(ARM_POP(CALLER_MASK & ~exclude_mask), ctx);

	/* Save return value */
	if (rd != ARM_R0)
		emit(ARM_MOV_R(rd, ARM_R0), ctx);
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