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Commit c909ca71 authored by Markos Chandras's avatar Markos Chandras Committed by Ralf Baechle
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MIPS: math-emu: Emulate missing BC1{EQ,NE}Z instructions 



Commit c8a34581 ("MIPS: Emulate the BC1{EQ,NE}Z FPU instructions")
added support for emulating the new R6 BC1{EQ,NE}Z branches but it missed
the case where the instruction that caused the exception was not on a DS.

Signed-off-by: default avatarMarkos Chandras <markos.chandras@imgtec.com>
Fixes: c8a34581 ("MIPS: Emulate the BC1{EQ,NE}Z FPU instructions")
Cc: <stable@vger.kernel.org> # 4.0+
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10738/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent e8f80cc1

arch/mips/math-emu/cp1emu.c

+19 −1
Original line number Diff line number Diff line
@@ -1181,6 +1181,24 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx, 
			}

			break;



		case bc1eqz_op:

		case bc1nez_op:

			if (!cpu_has_mips_r6 || delay_slot(xcp))

				return SIGILL;



			cond = likely = 0;

			switch (MIPSInst_RS(ir)) {

			case bc1eqz_op:

				if (get_fpr32(&current->thread.fpu.fpr[MIPSInst_RT(ir)], 0) & 0x1)

				    cond = 1;

				break;

			case bc1nez_op:

				if (!(get_fpr32(&current->thread.fpu.fpr[MIPSInst_RT(ir)], 0) & 0x1))

				    cond = 1;

				break;

			}

			goto branch_common;



		case bc_op:

			if (delay_slot(xcp))

				return SIGILL;
@@ -1207,7 +1225,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx, 
			case bct_op:

				break;

			}



branch_common:

			set_delay_slot(xcp);

			if (cond) {

				/*