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Commit c84911bb authored by Andrey Smirnov's avatar Andrey Smirnov Committed by Greg Kroah-Hartman
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ARM: dts: imx6sll: Specify IMX6SLL_CLK_IPG as "ipg" clock to SDMA 



[ Upstream commit c5ed5daa65d5f665e666b76c3dbfa503066defde ]

Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX6SLL_CLK_SDMA result in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX6SLL_CLK_IPG as "ipg" clock for SDMA, to avoid detecting
incorrect clock ratio.

Signed-off-by: default avatarAndrey Smirnov <andrew.smirnov@gmail.com>
Cc: Angus Ainslie (Purism) <angus@akkea.ca>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent a2e661f9

arch/arm/boot/dts/imx6sll.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -591,7 +591,7 @@ 
				compatible = "fsl,imx6sll-sdma", "fsl,imx35-sdma";

				reg = <0x020ec000 0x4000>;

				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SLL_CLK_SDMA>,

				clocks = <&clks IMX6SLL_CLK_IPG>,

					 <&clks IMX6SLL_CLK_SDMA>;

				clock-names = "ipg", "ahb";

				#dma-cells = <3>;