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Commit c7d5a005 authored by David S. Miller's avatar David S. Miller
Browse files

sparc64: Kill off old sys_perfctr system call and state. 



People should be using the perf events interfaces, and
the way these system call facilities used the %pcr conflicts
with the usage of the NMI watchdog and perf events.

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 6c5ae5b2

arch/sparc/include/asm/perfctr.h

+2 −2
Original line number Diff line number Diff line
@@ -10,8 +10,8 @@ 
 * from enumeration below.  The meaning of further arguments

 * are determined by the operation code.

 *

 * int sys_perfctr(int opcode, unsigned long arg0,

 *                 unsigned long arg1, unsigned long arg2)

 * NOTE: This system call is no longer provided, use the perf_events

 *       infrastructure.

 *

 * Pointers which are passed by the user are pointers to 64-bit

 * integers.

arch/sparc/include/asm/system_64.h

+1 −14
Original line number Diff line number Diff line
@@ -143,15 +143,7 @@ do { \ 
	 * and 2 stores in this critical code path.  -DaveM

	 */

#define switch_to(prev, next, last)					\

do {	if (test_thread_flag(TIF_PERFCTR)) {				\

		unsigned long __tmp;					\

		read_pcr(__tmp);					\

		current_thread_info()->pcr_reg = __tmp;			\

		read_pic(__tmp);					\

		current_thread_info()->kernel_cntd0 += (unsigned int)(__tmp);\

		current_thread_info()->kernel_cntd1 += ((__tmp) >> 32);	\

	}								\

	flush_tlb_pending();						\

do {	flush_tlb_pending();						\

	save_and_clear_fpu();						\

	/* If you are tempted to conditionalize the following */	\

	/* so that ASI is only written if it changes, think again. */	\
@@ -197,11 +189,6 @@ do { if (test_thread_flag(TIF_PERFCTR)) { \ 
	        "l1", "l2", "l3", "l4", "l5", "l6", "l7",		\

	  "i0", "i1", "i2", "i3", "i4", "i5",				\

	  "o0", "o1", "o2", "o3", "o4", "o5",       "o7");		\

	/* If you fuck with this, update ret_from_syscall code too. */	\

	if (test_thread_flag(TIF_PERFCTR)) {				\

		write_pcr(current_thread_info()->pcr_reg);		\

		reset_pic();						\

	}								\

} while(0)



static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val)

arch/sparc/include/asm/thread_info_64.h

+7 −18
Original line number Diff line number Diff line
@@ -58,11 +58,6 @@ struct thread_info { 
	unsigned long		gsr[7];

	unsigned long		xfsr[7];



	__u64			__user *user_cntd0;

	__u64			__user *user_cntd1;

	__u64			kernel_cntd0, kernel_cntd1;

	__u64			pcr_reg;



	struct restart_block	restart_block;



	struct pt_regs		*kern_una_regs;
@@ -96,15 +91,10 @@ struct thread_info { 
#define TI_RWIN_SPTRS	0x000003c8

#define TI_GSR		0x00000400

#define TI_XFSR		0x00000438

#define TI_USER_CNTD0	0x00000470

#define TI_USER_CNTD1	0x00000478

#define TI_KERN_CNTD0	0x00000480

#define TI_KERN_CNTD1	0x00000488

#define TI_PCR		0x00000490

#define TI_RESTART_BLOCK 0x00000498

#define TI_KUNA_REGS	0x000004c8

#define TI_KUNA_INSN	0x000004d0

#define TI_FPREGS	0x00000500

#define TI_RESTART_BLOCK 0x00000470

#define TI_KUNA_REGS	0x000004a0

#define TI_KUNA_INSN	0x000004a8

#define TI_FPREGS	0x000004c0



/* We embed this in the uppermost byte of thread_info->flags */

#define FAULT_CODE_WRITE	0x01	/* Write access, implies D-TLB	   */
@@ -199,7 +189,7 @@ register struct thread_info *current_thread_info_reg asm("g6"); 
 *

 * On trap return we need to test several values:

 *

 * user:	need_resched, notify_resume, sigpending, wsaved, perfctr

 * user:	need_resched, notify_resume, sigpending, wsaved

 * kernel:	fpdepth

 *

 * So to check for work in the kernel case we simply load the fpdepth
@@ -220,7 +210,7 @@ register struct thread_info *current_thread_info_reg asm("g6"); 
#define TIF_NOTIFY_RESUME	1	/* callback before returning to user */

#define TIF_SIGPENDING		2	/* signal pending */

#define TIF_NEED_RESCHED	3	/* rescheduling necessary */

#define TIF_PERFCTR		4	/* performance counters active */

/* flag bit 4 is available */

#define TIF_UNALIGNED		5	/* allowed to do unaligned accesses */

/* flag bit 6 is available */

#define TIF_32BIT		7	/* 32-bit binary */
@@ -241,7 +231,6 @@ register struct thread_info *current_thread_info_reg asm("g6"); 
#define _TIF_NOTIFY_RESUME	(1<<TIF_NOTIFY_RESUME)

#define _TIF_SIGPENDING		(1<<TIF_SIGPENDING)

#define _TIF_NEED_RESCHED	(1<<TIF_NEED_RESCHED)

#define _TIF_PERFCTR		(1<<TIF_PERFCTR)

#define _TIF_UNALIGNED		(1<<TIF_UNALIGNED)

#define _TIF_32BIT		(1<<TIF_32BIT)

#define _TIF_SECCOMP		(1<<TIF_SECCOMP)
@@ -252,7 +241,7 @@ register struct thread_info *current_thread_info_reg asm("g6"); 


#define _TIF_USER_WORK_MASK	((0xff << TI_FLAG_WSAVED_SHIFT) | \

				 _TIF_DO_NOTIFY_RESUME_MASK | \

				 _TIF_NEED_RESCHED | _TIF_PERFCTR)

				 _TIF_NEED_RESCHED)

#define _TIF_DO_NOTIFY_RESUME_MASK	(_TIF_NOTIFY_RESUME | _TIF_SIGPENDING)



/*

arch/sparc/kernel/entry.h

+0 −1
Original line number Diff line number Diff line
@@ -48,7 +48,6 @@ extern void __init boot_cpu_id_too_large(int cpu); 
extern unsigned int dcache_parity_tl1_occurred;

extern unsigned int icache_parity_tl1_occurred;



extern asmlinkage void update_perfctrs(void);

extern asmlinkage void sparc_breakpoint(struct pt_regs *regs);

extern void timer_interrupt(int irq, struct pt_regs *regs);

arch/sparc/kernel/process_64.c

+0 −23
Original line number Diff line number Diff line
@@ -352,12 +352,6 @@ void exit_thread(void) 
		else

			t->utraps[0]--;

	}



	if (test_and_clear_thread_flag(TIF_PERFCTR)) {

		t->user_cntd0 = t->user_cntd1 = NULL;

		t->pcr_reg = 0;

		write_pcr(0);

	}

}



void flush_thread(void)
@@ -371,13 +365,6 @@ void flush_thread(void) 


	set_thread_wsaved(0);



	/* Turn off performance counters if on. */

	if (test_and_clear_thread_flag(TIF_PERFCTR)) {

		t->user_cntd0 = t->user_cntd1 = NULL;

		t->pcr_reg = 0;

		write_pcr(0);

	}



	/* Clear FPU register state. */

	t->fpsaved[0] = 0;
@@ -591,16 +578,6 @@ int copy_thread(unsigned long clone_flags, unsigned long sp, 
		t->kregs->u_regs[UREG_FP] =

		  ((unsigned long) child_sf) - STACK_BIAS;



		/* Special case, if we are spawning a kernel thread from

		 * a userspace task (usermode helper, NFS or similar), we

		 * must disable performance counters in the child because

		 * the address space and protection realm are changing.

		 */

		if (t->flags & _TIF_PERFCTR) {

			t->user_cntd0 = t->user_cntd1 = NULL;

			t->pcr_reg = 0;

			t->flags &= ~_TIF_PERFCTR;

		}

		t->flags |= ((long)ASI_P << TI_FLAG_CURRENT_DS_SHIFT);

		t->kregs->u_regs[UREG_G6] = (unsigned long) t;

		t->kregs->u_regs[UREG_G4] = (unsigned long) t->task;