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Commit c6f54a9b authored by Uwe Kleine-König's avatar Uwe Kleine-König Committed by Russell King
Browse files

ARM: 8113/1: remove remaining definitions of PLAT_PHYS_OFFSET from <mach/memory.h> 



The platforms selecting NEED_MACH_MEMORY_H defined the start address of
their physical memory in the respective <mach/memory.h>. With
ARM_PATCH_PHYS_VIRT=y (which is quite common today) this is useless
though because the definition isn't used but determined dynamically.

So remove the definitions from all <mach/memory.h> and provide the
Kconfig symbol PHYS_OFFSET with the respective defaults in case
ARM_PATCH_PHYS_VIRT isn't enabled.

This allows to drop the dependency of PHYS_OFFSET on !NEED_MACH_MEMORY_H
which prevents compiling an integrator nommu-kernel.
(CONFIG_PAGE_OFFSET which has "default PHYS_OFFSET if !MMU" expanded to
"0x" because CONFIG_PHYS_OFFSET doesn't exist as INTEGRATOR selects
NEED_MACH_MEMORY_H.)

Signed-off-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 04fcab32

arch/arm/Kconfig

+15 −2
Original line number Diff line number Diff line
@@ -262,8 +262,22 @@ config NEED_MACH_MEMORY_H 


config PHYS_OFFSET

	hex "Physical address of main memory" if MMU

	depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H

	depends on !ARM_PATCH_PHYS_VIRT

	default DRAM_BASE if !MMU

	default 0x00000000 if ARCH_EBSA110 || \

			EP93XX_SDCE3_SYNC_PHYS_OFFSET || \

			ARCH_FOOTBRIDGE || \

			ARCH_INTEGRATOR || \

			ARCH_IOP13XX || \

			ARCH_KS8695 || \

			(ARCH_REALVIEW && !REALVIEW_HIGH_PHYS_OFFSET)

	default 0x10000000 if ARCH_OMAP1 || ARCH_RPC

	default 0x20000000 if ARCH_S5PV210

	default 0x70000000 if REALVIEW_HIGH_PHYS_OFFSET

	default 0xc0000000 if EP93XX_SDCE0_PHYS_OFFSET || ARCH_SA1100

	default 0xd0000000 if EP93XX_SDCE1_PHYS_OFFSET

	default 0xe0000000 if EP93XX_SDCE2_PHYS_OFFSET

	default 0xf0000000 if EP93XX_SDCE3_ASYNC_PHYS_OFFSET

	help

	  Please provide the physical address corresponding to the

	  location of main memory in your system.
@@ -435,7 +449,6 @@ config ARCH_EP93XX 
	select ARM_VIC

	select CLKDEV_LOOKUP

	select CPU_ARM920T

	select NEED_MACH_MEMORY_H

	help

	  This enables support for the Cirrus EP93xx series of CPUs.

arch/arm/include/asm/memory.h

+2 −4
Original line number Diff line number Diff line
@@ -150,13 +150,11 @@ 


/*

 * PLAT_PHYS_OFFSET is the offset (from zero) of the start of physical

 * memory.  This is used for XIP and NoMMU kernels, or by kernels which

 * have their own mach/memory.h.  Assembly code must always use

 * memory.  This is used for XIP and NoMMU kernels, and on platforms that don't

 * have CONFIG_ARM_PATCH_PHYS_VIRT. Assembly code must always use

 * PLAT_PHYS_OFFSET and not PHYS_OFFSET.

 */

#ifndef PLAT_PHYS_OFFSET

#define PLAT_PHYS_OFFSET	UL(CONFIG_PHYS_OFFSET)

#endif



#ifndef __ASSEMBLY__

arch/arm/mach-ebsa110/include/mach/memory.h

+0 −5
Original line number Diff line number Diff line
@@ -16,11 +16,6 @@ 
#ifndef __ASM_ARCH_MEMORY_H

#define __ASM_ARCH_MEMORY_H



/*

 * Physical DRAM offset.

 */

#define PLAT_PHYS_OFFSET	UL(0x00000000)



/*

 * Cache flushing area - SRAM

 */

arch/arm/mach-ep93xx/include/mach/memory.h

deleted100644 → 0
+0 −22
Original line number Diff line number Diff line 
/*

 * arch/arm/mach-ep93xx/include/mach/memory.h

 */



#ifndef __ASM_ARCH_MEMORY_H

#define __ASM_ARCH_MEMORY_H



#if defined(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET)

#define PLAT_PHYS_OFFSET		UL(0x00000000)

#elif defined(CONFIG_EP93XX_SDCE0_PHYS_OFFSET)

#define PLAT_PHYS_OFFSET		UL(0xc0000000)

#elif defined(CONFIG_EP93XX_SDCE1_PHYS_OFFSET)

#define PLAT_PHYS_OFFSET		UL(0xd0000000)

#elif defined(CONFIG_EP93XX_SDCE2_PHYS_OFFSET)

#define PLAT_PHYS_OFFSET		UL(0xe0000000)

#elif defined(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET)

#define PLAT_PHYS_OFFSET		UL(0xf0000000)

#else

#error "Kconfig bug: No EP93xx PHYS_OFFSET set"

#endif



#endif

arch/arm/mach-footbridge/include/mach/memory.h

+0 −5
Original line number Diff line number Diff line
@@ -59,11 +59,6 @@ extern unsigned long __bus_to_pfn(unsigned long); 
 */

#define FLUSH_BASE		0xf9000000



/*

 * Physical DRAM offset.

 */

#define PLAT_PHYS_OFFSET		UL(0x00000000)



#define FLUSH_BASE_PHYS		0x50000000



#endif