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Commit c6cf4d32 authored by Gabriel Fernandez's avatar Gabriel Fernandez Committed by Michael Turquette
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clk: stm32mp1: add PLL clocks



STMP32MP1 has 4 PLLs.
PLL supports integer and fractional mode.
Each PLL has 3 output dividers (p, q, r)

Signed-off-by: default avatarGabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
parent dc32eaac
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