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Commit c6a828d3 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: move all rps state into dev_priv->rps 



This way it's easier so see what belongs together, and what is used
by the ilk ips code. Also add some comments that explain the locking.

Note that (cur|min|max)_delay need to be duplicated, because
they're also used by the ips code.

v2: Missed one place that the dev_priv->ips change caught ...

Reviewed-by: default avatarBen Widawsky <ben@bwidawsk.net>
Reviewed-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 22bcfc6a

drivers/gpu/drm/i915/i915_debugfs.c

+6 −5
Original line number Diff line number Diff line
@@ -1274,7 +1274,8 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused) 


	seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");



	for (gpu_freq = dev_priv->min_delay; gpu_freq <= dev_priv->max_delay;

	for (gpu_freq = dev_priv->rps.min_delay;

	     gpu_freq <= dev_priv->rps.max_delay;

	     gpu_freq++) {

		I915_WRITE(GEN6_PCODE_DATA, gpu_freq);

		I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY |
@@ -1712,7 +1713,7 @@ i915_max_freq_read(struct file *filp, 
		return ret;



	len = snprintf(buf, sizeof(buf),

		       "max freq: %d\n", dev_priv->max_delay * 50);

		       "max freq: %d\n", dev_priv->rps.max_delay * 50);

	mutex_unlock(&dev->struct_mutex);



	if (len > sizeof(buf))
@@ -1755,7 +1756,7 @@ i915_max_freq_write(struct file *filp, 
	/*

	 * Turbo will still be enabled, but won't go above the set value.

	 */

	dev_priv->max_delay = val / 50;

	dev_priv->rps.max_delay = val / 50;



	gen6_set_rps(dev, val / 50);

	mutex_unlock(&dev->struct_mutex);
@@ -1788,7 +1789,7 @@ i915_min_freq_read(struct file *filp, char __user *ubuf, size_t max, 
		return ret;



	len = snprintf(buf, sizeof(buf),

		       "min freq: %d\n", dev_priv->min_delay * 50);

		       "min freq: %d\n", dev_priv->rps.min_delay * 50);

	mutex_unlock(&dev->struct_mutex);



	if (len > sizeof(buf))
@@ -1829,7 +1830,7 @@ i915_min_freq_write(struct file *filp, const char __user *ubuf, size_t cnt, 
	/*

	 * Turbo will still be enabled, but won't go below the set value.

	 */

	dev_priv->min_delay = val / 50;

	dev_priv->rps.min_delay = val / 50;



	gen6_set_rps(dev, val / 50);

	mutex_unlock(&dev->struct_mutex);

drivers/gpu/drm/i915/i915_dma.c

+1 −1
Original line number Diff line number Diff line
@@ -1605,7 +1605,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 


	spin_lock_init(&dev_priv->irq_lock);

	spin_lock_init(&dev_priv->error_lock);

	spin_lock_init(&dev_priv->rps_lock);

	spin_lock_init(&dev_priv->rps.lock);



	if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))

		dev_priv->num_pipe = 3;

drivers/gpu/drm/i915/i915_drv.h

+15 −3
Original line number Diff line number Diff line
@@ -819,9 +819,21 @@ typedef struct drm_i915_private { 


	bool mchbar_need_disable;



	struct work_struct rps_work;

	spinlock_t rps_lock;

	/* gen6+ rps state */

	struct {

		struct work_struct work;

		u32 pm_iir;

		/* lock - irqsave spinlock that protectects the work_struct and

		 * pm_iir. */

		spinlock_t lock;



		/* The below variables an all the rps hw state are protected by

		 * dev->struct mutext. */

		u8 cur_delay;

		u8 min_delay;

		u8 max_delay;

	} rps;





	u8 cur_delay;

	u8 min_delay;

drivers/gpu/drm/i915/i915_irq.c

+16 −16
Original line number Diff line number Diff line
@@ -349,16 +349,16 @@ static void notify_ring(struct drm_device *dev, 
static void gen6_pm_rps_work(struct work_struct *work)

{

	drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,

						    rps_work);

						    rps.work);

	u32 pm_iir, pm_imr;

	u8 new_delay;



	spin_lock_irq(&dev_priv->rps_lock);

	pm_iir = dev_priv->pm_iir;

	dev_priv->pm_iir = 0;

	spin_lock_irq(&dev_priv->rps.lock);

	pm_iir = dev_priv->rps.pm_iir;

	dev_priv->rps.pm_iir = 0;

	pm_imr = I915_READ(GEN6_PMIMR);

	I915_WRITE(GEN6_PMIMR, 0);

	spin_unlock_irq(&dev_priv->rps_lock);

	spin_unlock_irq(&dev_priv->rps.lock);



	if ((pm_iir & GEN6_PM_DEFERRED_EVENTS) == 0)

		return;
@@ -366,9 +366,9 @@ static void gen6_pm_rps_work(struct work_struct *work) 
	mutex_lock(&dev_priv->dev->struct_mutex);



	if (pm_iir & GEN6_PM_RP_UP_THRESHOLD)

		new_delay = dev_priv->cur_delay + 1;

		new_delay = dev_priv->rps.cur_delay + 1;

	else

		new_delay = dev_priv->cur_delay - 1;

		new_delay = dev_priv->rps.cur_delay - 1;



	gen6_set_rps(dev_priv->dev, new_delay);
@@ -488,20 +488,20 @@ static void gen6_queue_rps_work(struct drm_i915_private *dev_priv, 
	 * IIR bits should never already be set because IMR should

	 * prevent an interrupt from being shown in IIR. The warning

	 * displays a case where we've unsafely cleared

	 * dev_priv->pm_iir. Although missing an interrupt of the same

	 * dev_priv->rps.pm_iir. Although missing an interrupt of the same

	 * type is not a problem, it displays a problem in the logic.

	 *

	 * The mask bit in IMR is cleared by rps_work.

	 * The mask bit in IMR is cleared by dev_priv->rps.work.

	 */



	spin_lock_irqsave(&dev_priv->rps_lock, flags);

	WARN(dev_priv->pm_iir & pm_iir, "Missed a PM interrupt\n");

	dev_priv->pm_iir |= pm_iir;

	I915_WRITE(GEN6_PMIMR, dev_priv->pm_iir);

	spin_lock_irqsave(&dev_priv->rps.lock, flags);

	WARN(dev_priv->rps.pm_iir & pm_iir, "Missed a PM interrupt\n");

	dev_priv->rps.pm_iir |= pm_iir;

	I915_WRITE(GEN6_PMIMR, dev_priv->rps.pm_iir);

	POSTING_READ(GEN6_PMIMR);

	spin_unlock_irqrestore(&dev_priv->rps_lock, flags);

	spin_unlock_irqrestore(&dev_priv->rps.lock, flags);



	queue_work(dev_priv->wq, &dev_priv->rps_work);

	queue_work(dev_priv->wq, &dev_priv->rps.work);

}



static irqreturn_t valleyview_irq_handler(DRM_IRQ_ARGS)
@@ -2649,7 +2649,7 @@ void intel_irq_init(struct drm_device *dev) 


	INIT_WORK(&dev_priv->hotplug_work, i915_hotplug_work_func);

	INIT_WORK(&dev_priv->error_work, i915_error_work_func);

	INIT_WORK(&dev_priv->rps_work, gen6_pm_rps_work);

	INIT_WORK(&dev_priv->rps.work, gen6_pm_rps_work);

	INIT_WORK(&dev_priv->parity_error_work, ivybridge_parity_work);



	dev->driver->get_vblank_counter = i915_get_vblank_counter;

drivers/gpu/drm/i915/intel_display.c

+1 −1
Original line number Diff line number Diff line
@@ -7218,7 +7218,7 @@ void intel_modeset_cleanup(struct drm_device *dev) 
	 * enqueue unpin/hotplug work. */

	drm_irq_uninstall(dev);

	cancel_work_sync(&dev_priv->hotplug_work);

	cancel_work_sync(&dev_priv->rps_work);

	cancel_work_sync(&dev_priv->rps.work);



	/* flush any delayed tasks or pending work */

	flush_scheduled_work();