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Commit c6a7b195 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "clk: qcom: Add clock asynchronous resets to BCRs"

parents 9242754f 9f6fc8a1
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// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
 */

#define pr_fmt(fmt) "clk: %s: " fmt, __func__
@@ -4275,6 +4275,8 @@ static const struct qcom_reset_map gcc_kona_resets[] = {
	[GCC_USB3PHY_PHY_PRIM_BCR] = { 0x50004 },
	[GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 },
	[GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 },
	[GCC_VIDEO_AXI0_CLK_BCR] = { 0xb024, 2 },
	[GCC_VIDEO_AXI1_CLK_BCR] = { 0xb028, 2 },
};

static const struct clk_rcg_dfs_data gcc_dfs_clocks[] = {
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// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
 */

#define pr_fmt(fmt) "clk: %s: " fmt, __func__
@@ -482,6 +482,8 @@ static const struct qcom_reset_map video_cc_kona_resets[] = {
	[CVP_VIDEO_CC_MVS0C_BCR] = { 0xbf4 },
	[CVP_VIDEO_CC_MVS1_BCR] = { 0xd94 },
	[CVP_VIDEO_CC_MVS1C_BCR] = { 0xc94 },
	[VIDEO_CC_MVS0C_CLK_BCR] = { 0xc34, 2},
	[VIDEO_CC_MVS1C_CLK_BCR] = { 0xcd4, 2},
};

static const struct regmap_config video_cc_kona_regmap_config = {
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
 */

#ifndef _DT_BINDINGS_CLK_QCOM_GCC_KONA_H
@@ -268,5 +268,7 @@
#define GCC_USB3PHY_PHY_PRIM_BCR				41
#define GCC_USB3PHY_PHY_SEC_BCR					42
#define GCC_USB_PHY_CFG_AHB2PHY_BCR				43
#define GCC_VIDEO_AXI0_CLK_BCR					44
#define GCC_VIDEO_AXI1_CLK_BCR					45

#endif
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/* SPDX-License-Identifier: GPL-2.0-only */
/* Copyright (c) 2018, The Linux Foundation. All rights reserved. */
/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. */

#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_KONA_H
#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_KONA_H
@@ -32,5 +32,7 @@
#define CVP_VIDEO_CC_MVS0C_BCR					2
#define CVP_VIDEO_CC_MVS1_BCR					3
#define CVP_VIDEO_CC_MVS1C_BCR					4
#define VIDEO_CC_MVS0C_CLK_BCR					5
#define VIDEO_CC_MVS1C_CLK_BCR					6

#endif