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Commit c67da7c7 authored by Heiko Carstens's avatar Heiko Carstens Committed by Martin Schwidefsky
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s390/mm: introduce defines to reflect the hardware mmu 



Add various defines like e.g. _REGION1_SHIFT to reflect the hardware
mmu. We have quite a bit code that does not make use of the Linux
memory management primitives but directly modifies page, segment and
region values.

Most of this is open-coded like e.g. "1UL << 53". In order to clean
this up introduce a couple of new defines. The existing Linux memory
management defines are changed, so the mapping to the hardware
implementation is reflected.

Reviewed-by: default avatarMartin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: default avatarHeiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: default avatarMartin Schwidefsky <schwidefsky@de.ibm.com>
parent a31a00ba

arch/s390/include/asm/page.h

+7 −3
Original line number Diff line number Diff line
@@ -10,10 +10,14 @@ 
#include <linux/const.h>

#include <asm/types.h>



#define _PAGE_SHIFT	12

#define _PAGE_SIZE	(_AC(1, UL) << _PAGE_SHIFT)

#define _PAGE_MASK	(~(_PAGE_SIZE - 1))



/* PAGE_SHIFT determines the page size */

#define PAGE_SHIFT      12

#define PAGE_SIZE	(_AC(1,UL) << PAGE_SHIFT)

#define PAGE_MASK       (~(PAGE_SIZE-1))

#define PAGE_SHIFT	_PAGE_SHIFT

#define PAGE_SIZE	_PAGE_SIZE

#define PAGE_MASK	_PAGE_MASK

#define PAGE_DEFAULT_ACC	0

#define PAGE_DEFAULT_KEY	(PAGE_DEFAULT_ACC << 4)

arch/s390/include/asm/pgalloc.h

+2 −0
Original line number Diff line number Diff line
@@ -15,6 +15,8 @@ 
#include <linux/gfp.h>

#include <linux/mm.h>



#define CRST_ALLOC_ORDER 2



unsigned long *crst_table_alloc(struct mm_struct *);

void crst_table_free(struct mm_struct *, unsigned long *);

arch/s390/include/asm/pgtable.h

+48 −20
Original line number Diff line number Diff line
@@ -65,26 +65,6 @@ extern unsigned long zero_page_mask; 


/* TODO: s390 cannot support io_remap_pfn_range... */



#define PMD_SHIFT	20

#define PUD_SHIFT	31

#define P4D_SHIFT	42

#define PGDIR_SHIFT	53



#define PMD_SIZE        (1UL << PMD_SHIFT)

#define PMD_MASK        (~(PMD_SIZE-1))

#define PUD_SIZE	(1UL << PUD_SHIFT)

#define PUD_MASK	(~(PUD_SIZE-1))

#define P4D_SIZE	(1UL << P4D_SHIFT)

#define P4D_MASK	(~(P4D_SIZE-1))

#define PGDIR_SIZE	(1UL << PGDIR_SHIFT)

#define PGDIR_MASK	(~(PGDIR_SIZE-1))



#define PTRS_PER_PTE	256

#define PTRS_PER_PMD	2048

#define PTRS_PER_PUD	2048

#define PTRS_PER_P4D	2048

#define PTRS_PER_PGD	2048



#define FIRST_USER_ADDRESS  0UL



#define pte_ERROR(e) \
@@ -314,6 +294,54 @@ static inline int is_module_addr(void *addr) 
#define _SEGMENT_ENTRY_SOFT_DIRTY 0x0000 /* SW segment soft dirty bit */

#endif



#define _CRST_ENTRIES	2048	/* number of region/segment table entries */

#define _PAGE_ENTRIES	256	/* number of page table entries	*/



#define _CRST_TABLE_SIZE (_CRST_ENTRIES * 8)

#define _PAGE_TABLE_SIZE (_PAGE_ENTRIES * 8)



#define _REGION1_SHIFT	53

#define _REGION2_SHIFT	42

#define _REGION3_SHIFT	31

#define _SEGMENT_SHIFT	20



#define _REGION1_INDEX	(0x7ffUL << _REGION1_SHIFT)

#define _REGION2_INDEX	(0x7ffUL << _REGION2_SHIFT)

#define _REGION3_INDEX	(0x7ffUL << _REGION3_SHIFT)

#define _SEGMENT_INDEX	(0x7ffUL << _SEGMENT_SHIFT)

#define _PAGE_INDEX	(0xffUL  << _PAGE_SHIFT)



#define _REGION1_SIZE	(1UL << _REGION1_SHIFT)

#define _REGION2_SIZE	(1UL << _REGION2_SHIFT)

#define _REGION3_SIZE	(1UL << _REGION3_SHIFT)

#define _SEGMENT_SIZE	(1UL << _SEGMENT_SHIFT)



#define _REGION1_MASK	(~(_REGION1_SIZE - 1))

#define _REGION2_MASK	(~(_REGION2_SIZE - 1))

#define _REGION3_MASK	(~(_REGION3_SIZE - 1))

#define _SEGMENT_MASK	(~(_SEGMENT_SIZE - 1))



#define PMD_SHIFT	_SEGMENT_SHIFT

#define PUD_SHIFT	_REGION3_SHIFT

#define P4D_SHIFT	_REGION2_SHIFT

#define PGDIR_SHIFT	_REGION1_SHIFT



#define PMD_SIZE	_SEGMENT_SIZE

#define PUD_SIZE	_REGION3_SIZE

#define P4D_SIZE	_REGION2_SIZE

#define PGDIR_SIZE	_REGION1_SIZE



#define PMD_MASK	_SEGMENT_MASK

#define PUD_MASK	_REGION3_MASK

#define P4D_MASK	_REGION2_MASK

#define PGDIR_MASK	_REGION1_MASK



#define PTRS_PER_PTE	_PAGE_ENTRIES

#define PTRS_PER_PMD	_CRST_ENTRIES

#define PTRS_PER_PUD	_CRST_ENTRIES

#define PTRS_PER_P4D	_CRST_ENTRIES

#define PTRS_PER_PGD	_CRST_ENTRIES



/*

 * Segment table and region3 table entry encoding

 * (R = read-only, I = invalid, y = young bit):