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Commit c61c48df authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'xtensa-next-20130508' of git://github.com/czankel/xtensa-linux

Pull xtensa updates from Chris Zankel:
 "Support for the latest MMU architecture that allows for a larger
  accessible memory region, and various bug-fixes"

* tag 'xtensa-next-20130508' of git://github.com/czankel/xtensa-linux:
  xtensa: Switch to asm-generic/linkage.h
  xtensa: fix redboot load address
  xtensa: ISS: fix timer_lock usage in rs_open
  xtensa: disable IRQs while IRQ handler is running
  xtensa: enable lockdep support
  xtensa: fix arch_irqs_disabled_flags implementation
  xtensa: add irq flags trace support
  xtensa: provide custom CALLER_ADDR* implementations
  xtensa: add stacktrace support
  xtensa: clean up stpill_registers
  xtensa: don't use a7 in simcalls
  xtensa: don't attempt to use unconfigured timers
  xtensa: provide default platform_pcibios_init implementation
  xtensa: remove KCORE_ELF again
  xtensa: document MMUv3 setup sequence
  xtensa: add MMU v3 support
  xtensa: fix ibreakenable register update
  xtensa: fix oprofile building as module
parents e30f4192 b341d84c
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+46 −0
Original line number Diff line number Diff line
MMUv3 initialization sequence.

The code in the initialize_mmu macro sets up MMUv3 memory mapping
identically to MMUv2 fixed memory mapping. Depending on
CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX symbol this code is
located in one of the following address ranges:

    0xF0000000..0xFFFFFFFF (will keep same address in MMU v2 layout;
    			 typically ROM)
    0x00000000..0x07FFFFFF (system RAM; this code is actually linked
    			 at 0xD0000000..0xD7FFFFFF [cached]
    			 or 0xD8000000..0xDFFFFFFF [uncached];
    			 in any case, initially runs elsewhere
    			 than linked, so have to be careful)

The code has the following assumptions:
  This code fragment is run only on an MMU v3.
  TLBs are in their reset state.
  ITLBCFG and DTLBCFG are zero (reset state).
  RASID is 0x04030201 (reset state).
  PS.RING is zero (reset state).
  LITBASE is zero (reset state, PC-relative literals); required to be PIC.

TLB setup proceeds along the following steps.

  Legend:
    VA = virtual address (two upper nibbles of it);
    PA = physical address (two upper nibbles of it);
    pc = physical range that contains this code;

After step 2, we jump to virtual address in 0x40000000..0x5fffffff
that corresponds to next instruction to execute in this code.
After step 4, we jump to intended (linked) address of this code.

    Step 0     Step1     Step 2     Step3     Step 4     Step5
 ============  =====  ============  =====  ============  =====
   VA      PA     PA    VA      PA     PA    VA      PA     PA
 ------    --     --  ------    --     --  ------    --     --
 E0..FF -> E0  -> E0  E0..FF -> E0         F0..FF -> F0  -> F0
 C0..DF -> C0  -> C0  C0..DF -> C0         E0..EF -> F0  -> F0
 A0..BF -> A0  -> A0  A0..BF -> A0         D8..DF -> 00  -> 00
 80..9F -> 80  -> 80  80..9F -> 80         D0..D7 -> 00  -> 00
 60..7F -> 60  -> 60  60..7F -> 60
 40..5F -> 40         40..5F -> pc  -> pc  40..5F -> pc
 20..3F -> 20  -> 20  20..3F -> 20
 00..1F -> 00  -> 00  00..1F -> 00
+39 −18
Original line number Diff line number Diff line
config FRAME_POINTER
	def_bool n

config ZONE_DMA
	def_bool y

config XTENSA
	def_bool y
	select ARCH_WANT_FRAME_POINTERS
	select HAVE_IDE
	select GENERIC_ATOMIC64
	select HAVE_GENERIC_HARDIRQS
@@ -49,6 +47,15 @@ config HZ
source "init/Kconfig"
source "kernel/Kconfig.freezer"

config LOCKDEP_SUPPORT
	def_bool y

config STACKTRACE_SUPPORT
	def_bool y

config TRACE_IRQFLAGS_SUPPORT
	def_bool y

config MMU
	def_bool n

@@ -100,6 +107,35 @@ config MATH_EMULATION
	help
	Can we use information of configuration file?

config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
	bool "Initialize Xtensa MMU inside the Linux kernel code"
	default y
	help
	  Earlier version initialized the MMU in the exception vector
	  before jumping to _startup in head.S and had an advantage that
	  it was possible to place a software breakpoint at 'reset' and
	  then enter your normal kernel breakpoints once the MMU was mapped
	  to the kernel mappings (0XC0000000).

	  This unfortunately doesn't work for U-Boot and likley also wont
	  work for using KEXEC to have a hot kernel ready for doing a
	  KDUMP.

	  So now the MMU is initialized in head.S but it's necessary to
	  use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
	  xt-gdb can't place a Software Breakpoint in the  0XD region prior
	  to mapping the MMU and after mapping even if the area of low memory
	  was mapped gdb wouldn't remove the breakpoint on hitting it as the
	  PC wouldn't match. Since Hardware Breakpoints are recommended for
	  Linux configurations it seems reasonable to just assume they exist
	  and leave this older mechanism for unfortunate souls that choose
	  not to follow Tensilica's recommendation.

	  Selecting this will cause U-Boot to set the KERNEL Load and Entry
	  address at 0x00003000 instead of the mapped std of 0xD0003000.

	  If in doubt, say Y.

endmenu

config XTENSA_CALIBRATE_CCOUNT
@@ -249,21 +285,6 @@ endmenu

menu "Executable file formats"

# only elf supported
config KCORE_ELF
	def_bool y
        depends on PROC_FS
        help
          If you enabled support for /proc file system then the file
          /proc/kcore will contain the kernel core image in ELF format. This
          can be used in gdb:

          $ cd /usr/src/linux ; gdb vmlinux /proc/kcore

          This is especially useful if you have compiled the kernel with the
          "-g" option to preserve debugging information. It is mainly used
	  for examining kernel data structures on the live kernel.

source "fs/Kconfig.binfmt"

endmenu
+1 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ endif

export OBJCOPY_ARGS
export CPPFLAGS_boot.lds += -P -C
export KBUILD_AFLAGS += -mtext-section-literals

boot-y		:= bootstrap.o

+26 −38
Original line number Diff line number Diff line
#include <variant/core.h>
/*
 *  linux/arch/xtensa/boot/boot-elf/boot.lds.S
 *
 *  Copyright (C) 2008 - 2013 by Tensilica Inc.
 *
 *  Chris Zankel <chris@zankel.net>
 *  Marc Gauthier <marc@tensilica.com
 *  Pete Delaney <piet@tensilica.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <asm/vectors.h>
OUTPUT_ARCH(xtensa)
ENTRY(_ResetVector)

SECTIONS
{
	.start 0xD0000000 : { *(.start) }

	.text 0xD0000000:
	{
		__reloc_start = . ;
		_text_start = . ;
		*(.literal .text.literal .text)
		_text_end = . ;
	}

	.rodata ALIGN(0x04):
	{
		*(.rodata)
		*(.rodata1)
	}

	.data ALIGN(0x04):
	.ResetVector.text XCHAL_RESET_VECTOR_VADDR :
	{
		*(.data)
		*(.data1)
		*(.sdata)
		*(.sdata2)
		*(.got.plt)
		*(.got)
		*(.dynamic)
		*(.ResetVector.text)
	}

	__reloc_end = . ;

	. = ALIGN(0x10);
	__image_load = . ;
	.image 0xd0001000:
	.image KERNELOFFSET: AT (LOAD_MEMORY_ADDRESS)
	{
		_image_start = .;
		*(image)
@@ -43,7 +31,6 @@ SECTIONS
		_image_end = .	;
	}


	.bss ((LOADADDR(.image) + SIZEOF(.image) + 3) & ~ 3):
	{
		__bss_start = .;
@@ -53,14 +40,15 @@ SECTIONS
		*(.bss)
		__bss_end = .;
	}
	_end = .;
	_param_start = .;

	.ResetVector.text XCHAL_RESET_VECTOR_VADDR :
	/*
	 * This is a remapped copy of the Reset Vector Code.
	 * It keeps gdb in sync with the PC after switching
	 * to the temporary mapping used while setting up
	 * the V2 MMU mappings for Linux.
	 */
	.ResetVector.remapped_text 0x46000000 (INFO):
	{
		*(.ResetVector.text)
		*(.ResetVector.remapped_text)
	}


	PROVIDE (end = .);
}
+86 −15
Original line number Diff line number Diff line
/*
 * arch/xtensa/boot/boot-elf/bootstrap.S
 *
 * Low-level exception handling
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2004 - 2013 by Tensilica Inc.
 *
 * Chris Zankel <chris@zankel.net>
 * Marc Gauthier <marc@tensilica.com>
 * Piet Delaney <piet@tensilica.com>
 */

#include <asm/bootparam.h>
#include <asm/processor.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/cacheasm.h>
#include <asm/initialize_mmu.h>
#include <linux/linkage.h>


/* ResetVector
 */
	.section	.ResetVector.text, "ax"
	.global         _ResetVector
	.global         reset

_ResetVector:
	_j reset
	_j _SetupMMU

	.begin  no-absolute-literals
	.literal_position

	.align 4
RomInitAddr:
	.word 0xd0001000
#if defined(CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) && \
	XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
	.word 0x00003000
#else
	.word 0xd0003000
#endif
RomBootParam:
	.word _bootparam
_bootparam:
	.short	BP_TAG_FIRST
	.short	4
	.long	BP_VERSION
	.short	BP_TAG_LAST
	.short	0
	.long	0

	.align  4
_SetupMMU:
	movi	a0, 0
	wsr	a0, windowbase
	rsync
	movi	a0, 1
	wsr	a0, windowstart
	rsync
	movi	a0, 0x1F
	wsr	a0, ps
	rsync

	Offset = _SetupMMU - _ResetVector

#ifndef CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
	initialize_mmu
#endif

	.end    no-absolute-literals

	rsil    a0, XCHAL_DEBUGLEVEL-1
	rsync
reset:
	l32r    a0, RomInitAddr
	l32r	a2, RomBootParam
@@ -21,13 +80,25 @@ reset:
	jx      a0

	.align 4
	.section .bootstrap.data, "aw"

	.globl _bootparam
_bootparam:
	.short	BP_TAG_FIRST
	.short	4
	.long	BP_VERSION
	.short	BP_TAG_LAST
	.short	0
	.long	0
	.section	.ResetVector.remapped_text, "x"
	.global         _RemappedResetVector

	/* Do org before literals */
	.org 0

_RemappedResetVector:
	.begin  no-absolute-literals
	.literal_position

	_j	_RemappedSetupMMU

	/* Position Remapped code at the same location as the original code */
	. = _RemappedResetVector + Offset

_RemappedSetupMMU:
#ifndef CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
	initialize_mmu
#endif

	.end    no-absolute-literals
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