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Commit c55e0884 authored by Govindaraj Rajagopal's avatar Govindaraj Rajagopal Committed by Gerrit - the friendly Code Review server
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msm: vidc: add support for enc_chroma_qp_offset 



[1] add support for HFI_PROPERTY_PARAM_HEVC_PPS_CB_CR_OFFSET
[2] send (cb_qp_offset << 16 | cr_qp_offset) to firmware
[3] default:0 and overridden: -12
[4] firmware will subtract 12 from driver sent value.
      0 maps to 12 to fw and bitstream has 0
    -12 maps to  0 to fw and bitstream has -12

Change-Id: I286c7088640349691930c95e9b176e4e748c669a
Signed-off-by: default avatarGovindaraj Rajagopal <grajagop@codeaurora.org>
parent 24a655e3

msm/vidc/msm_venc.c

+76 −0
Original line number Diff line number Diff line
@@ -944,6 +944,15 @@ static struct msm_vidc_ctrl msm_venc_ctrls[] = { 
		.default_value = 3,

		.step = 1,

	},

	{

		.id = V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET,

		.name = "Chroma QP Index Offset",

		.type = V4L2_CTRL_TYPE_INTEGER,

		.minimum = -12,

		.maximum = 0,

		.default_value = 0,

		.step = 1,

	},

	{

		.id = V4L2_CID_MPEG_VIDEO_VBV_DELAY,

		.name = "Set Vbv Delay",
@@ -1978,6 +1987,7 @@ int msm_venc_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) 
	case V4L2_CID_MPEG_VIDC_VENC_RC_TIMESTAMP_DISABLE:

	case V4L2_CID_MPEG_VIDEO_VBV_DELAY:

	case V4L2_CID_MPEG_VIDC_VENC_BITRATE_SAVINGS:

	case V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET:

	case V4L2_CID_MPEG_VIDC_SUPERFRAME:

		s_vpr_h(sid, "Control set: ID : 0x%x Val : %d\n",

			ctrl->id, ctrl->val);
@@ -3369,6 +3379,69 @@ int msm_venc_set_bitrate_savings_mode(struct msm_vidc_inst *inst) 
	return rc;

}



int msm_venc_set_chroma_qp_offset(struct msm_vidc_inst *inst)

{

	int rc = 0;

	struct hfi_device *hdev;

	struct v4l2_ctrl *chr;

	struct v4l2_ctrl *ctrl_cs;

	struct hfi_chroma_qp_offset chroma_qp;

	struct v4l2_format *f;

	u32 codec, width, height, mbpf;



	if (!inst || !inst->core) {

		d_vpr_e("%s: invalid params %pK\n", __func__, inst);

		return -EINVAL;

	}

	hdev = inst->core->device;



	chr = get_ctrl(inst, V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET);

	if (chr->val != -12)

		return 0;



	f = &inst->fmts[INPUT_PORT].v4l2_fmt;

	width = f->fmt.pix_mp.width;

	height = f->fmt.pix_mp.height;

	mbpf = NUM_MBS_PER_FRAME(width, height);

	ctrl_cs = get_ctrl(inst, V4L2_CID_MPEG_VIDC_VIDEO_COLOR_SPACE);

	codec = get_v4l2_codec(inst);



	/**

	 * Set chroma qp offset to HEVC & VBR_CFR rc

	 * 10 bit: only BT2020

	 *  8 bit: only mbpf >= num_mbs(7680, 3840)

	 */

	if (codec != V4L2_PIX_FMT_HEVC ||

		inst->rc_type != V4L2_MPEG_VIDEO_BITRATE_MODE_VBR)

		return 0;



	if ((inst->bit_depth == MSM_VIDC_BIT_DEPTH_10 &&

		ctrl_cs->val != MSM_VIDC_BT2020) ||

		(inst->bit_depth == MSM_VIDC_BIT_DEPTH_8 &&

		mbpf < NUM_MBS_PER_FRAME(7680, 3840)))

		return 0;



	/**

	 * client sets one chroma offset only in range [-12, 0]

	 * firmware expects chroma cb offset and cr offset in

	 * range [0, 12], firmware subtracts 12 from driver set values.

	 */

	chroma_qp.chroma_offset = (chr->val + 12) << 16 | (chr->val + 12);

	s_vpr_h(inst->sid, "%s: %x\n", __func__, chroma_qp.chroma_offset);



	/* TODO: Remove this check after firmware support added for 8-bit */

	if (inst->bit_depth == MSM_VIDC_BIT_DEPTH_8)

		return 0;



	rc = call_hfi_op(hdev, session_set_property, inst->session,

		HFI_PROPERTY_PARAM_HEVC_PPS_CB_CR_OFFSET, &chroma_qp,

		sizeof(chroma_qp));

	if (rc)

		s_vpr_e(inst->sid, "%s: set property failed\n", __func__);



	return rc;

}



int msm_venc_set_loop_filter_mode(struct msm_vidc_inst *inst)

{

	int rc = 0;
@@ -4711,6 +4784,9 @@ int msm_venc_set_properties(struct msm_vidc_inst *inst) 
	if (rc)

		goto exit;

	rc = msm_venc_set_video_csc(inst);

	if (rc)

		goto exit;

	rc = msm_venc_set_chroma_qp_offset(inst);

	if (rc)

		goto exit;

	rc = msm_venc_set_blur_resolution(inst);

msm/vidc/vidc_hfi_helper.h

+8 −1
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.

 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.

 */



#ifndef __H_VIDC_HFI_HELPER_H__
@@ -350,6 +350,8 @@ struct hfi_buffer_info { 
	(HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x038)

#define HFI_PROPERTY_PARAM_VENC_LOSSLESS_ENCODING \

	(HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x039)

#define HFI_PROPERTY_PARAM_HEVC_PPS_CB_CR_OFFSET \

	(HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x040)



#define HFI_PROPERTY_CONFIG_VENC_COMMON_START				\

	(HFI_DOMAIN_BASE_VENC + HFI_ARCH_COMMON_OFFSET + 0x6000)
@@ -518,6 +520,11 @@ struct hfi_operating_rate { 
	u32 operating_rate;

};



struct hfi_chroma_qp_offset {

	u32 chroma_offset;

	u32 reserved;

};



#define HFI_INTRA_REFRESH_NONE				(HFI_COMMON_BASE + 0x1)

#define HFI_INTRA_REFRESH_CYCLIC			(HFI_COMMON_BASE + 0x2)

#define HFI_INTRA_REFRESH_RANDOM			(HFI_COMMON_BASE + 0x5)