Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit c4e8db5f authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'amlogic-dt' of...

Merge tag 'amlogic-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt

Pull "Amlogic 32-bit DT changes for v4.16" from Kevin Hilman:
- meson8: GPIO IRQ support
- switch to stable UART bindings w/correct clock
- add more L2 cache settings
- drop unused ADC clock

* tag 'amlogic-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM: meson: enable MESON_IRQ_GPIO also for MACH_MESON8
  ARM: dts: meson8: enable the GPIO interrupt controller
  ARM: dts: meson8b: use stable UART bindings with correct gate clock
  ARM: dts: meson8: use stable UART bindings with correct gate clock
  ARM: dts: meson: drop "sana" clock from SAR ADC
  ARM: dts: meson8: add more L2 cache settings
  ARM: dts: meson8b: add more L2 cache settings
parents 7d44cc20 71a3dfd0
Loading
Loading
Loading
Loading
+22 −7
Original line number Original line Diff line number Diff line
@@ -286,6 +286,11 @@
	clock-names = "stmmaceth";
	clock-names = "stmmaceth";
};
};


&gpio_intc {
	compatible = "amlogic,meson8-gpio-intc", "amlogic,meson-gpio-intc";
	status = "okay";
};

&hwrng {
&hwrng {
	compatible = "amlogic,meson8-rng", "amlogic,meson-rng";
	compatible = "amlogic,meson8-rng", "amlogic,meson-rng";
	clocks = <&clkc CLKID_RNG0>;
	clocks = <&clkc CLKID_RNG0>;
@@ -308,6 +313,9 @@
	arm,data-latency = <3 3 3>;
	arm,data-latency = <3 3 3>;
	arm,tag-latency = <2 2 2>;
	arm,tag-latency = <2 2 2>;
	arm,filter-ranges = <0x100000 0xc0000000>;
	arm,filter-ranges = <0x100000 0xc0000000>;
	prefetch-data = <1>;
	prefetch-instr = <1>;
	arm,shared-override;
};
};


&pwm_ab {
&pwm_ab {
@@ -321,9 +329,8 @@
&saradc {
&saradc {
	compatible = "amlogic,meson8-saradc", "amlogic,meson-saradc";
	compatible = "amlogic,meson8-saradc", "amlogic,meson-saradc";
	clocks = <&clkc CLKID_XTAL>,
	clocks = <&clkc CLKID_XTAL>,
		<&clkc CLKID_SAR_ADC>,
		<&clkc CLKID_SAR_ADC>;
		<&clkc CLKID_SANA>;
	clock-names = "clkin", "core";
	clock-names = "clkin", "core", "sana";
};
};


&sdio {
&sdio {
@@ -337,19 +344,27 @@
};
};


&uart_AO {
&uart_AO {
	clocks = <&clkc CLKID_CLK81>;
	compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
	clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
	clock-names = "baud", "xtal", "pclk";
};
};


&uart_A {
&uart_A {
	clocks = <&clkc CLKID_CLK81>;
	compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
	clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART0>;
	clock-names = "baud", "xtal", "pclk";
};
};


&uart_B {
&uart_B {
	clocks = <&clkc CLKID_CLK81>;
	compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
	clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART1>;
	clock-names = "baud", "xtal", "pclk";
};
};


&uart_C {
&uart_C {
	clocks = <&clkc CLKID_CLK81>;
	compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
	clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART2>;
	clock-names = "baud", "xtal", "pclk";
};
};


&usb0 {
&usb0 {
+17 −7
Original line number Original line Diff line number Diff line
@@ -223,6 +223,9 @@
	arm,data-latency = <3 3 3>;
	arm,data-latency = <3 3 3>;
	arm,tag-latency = <2 2 2>;
	arm,tag-latency = <2 2 2>;
	arm,filter-ranges = <0x100000 0xc0000000>;
	arm,filter-ranges = <0x100000 0xc0000000>;
	prefetch-data = <1>;
	prefetch-instr = <1>;
	arm,shared-override;
};
};


&pwm_ab {
&pwm_ab {
@@ -236,9 +239,8 @@
&saradc {
&saradc {
	compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc";
	compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc";
	clocks = <&clkc CLKID_XTAL>,
	clocks = <&clkc CLKID_XTAL>,
		<&clkc CLKID_SAR_ADC>,
		<&clkc CLKID_SAR_ADC>;
		<&clkc CLKID_SANA>;
	clock-names = "clkin", "core";
	clock-names = "clkin", "core", "sana";
};
};


&sdio {
&sdio {
@@ -248,19 +250,27 @@
};
};


&uart_AO {
&uart_AO {
	clocks = <&clkc CLKID_CLK81>;
	compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
	clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
	clock-names = "baud", "xtal", "pclk";
};
};


&uart_A {
&uart_A {
	clocks = <&clkc CLKID_CLK81>;
	compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
	clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART0>;
	clock-names = "baud", "xtal", "pclk";
};
};


&uart_B {
&uart_B {
	clocks = <&clkc CLKID_CLK81>;
	compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
	clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART1>;
	clock-names = "baud", "xtal", "pclk";
};
};


&uart_C {
&uart_C {
	clocks = <&clkc CLKID_CLK81>;
	compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
	clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART2>;
	clock-names = "baud", "xtal", "pclk";
};
};


&usb0 {
&usb0 {
+1 −0
Original line number Original line Diff line number Diff line
@@ -23,6 +23,7 @@ config MACH_MESON8
	default ARCH_MESON
	default ARCH_MESON
	select MESON6_TIMER
	select MESON6_TIMER
	select COMMON_CLK_MESON8B
	select COMMON_CLK_MESON8B
	select MESON_IRQ_GPIO


config MACH_MESON8B
config MACH_MESON8B
	bool "Amlogic Meson8b SoCs support"
	bool "Amlogic Meson8b SoCs support"