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Commit c38e8016 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2016-06-22' of git://anongit.freedesktop.org/drm-intel into drm-fixes 

 Hi Dave, just a couple of display fixes, both stable stuff. Maybe we'll
be able to enable fbc by default one day.

* tag 'drm-intel-fixes-2016-06-22' of git://anongit.freedesktop.org/drm-intel:
  drm/i915/fbc: Disable on HSW by default for now
  drm/i915: Revert DisplayPort fast link training feature
parents 718cc664 1e3fa0ac

drivers/gpu/drm/i915/intel_dp.c

+0 −3
Original line number Diff line number Diff line
@@ -4977,9 +4977,6 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd) 
	intel_display_power_get(dev_priv, power_domain);



	if (long_hpd) {

		/* indicate that we need to restart link training */

		intel_dp->train_set_valid = false;



		intel_dp_long_pulse(intel_dp->attached_connector);

		if (intel_dp->is_mst)

			ret = IRQ_HANDLED;

drivers/gpu/drm/i915/intel_dp_link_training.c

+2 −24
Original line number Diff line number Diff line
@@ -85,7 +85,6 @@ static bool 
intel_dp_reset_link_train(struct intel_dp *intel_dp,

			uint8_t dp_train_pat)

{

	if (!intel_dp->train_set_valid)

	memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set));

	intel_dp_set_signal_levels(intel_dp);

	return intel_dp_set_link_train(intel_dp, dp_train_pat);
@@ -161,23 +160,6 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp) 
			break;

		}



		/*

		 * if we used previously trained voltage and pre-emphasis values

		 * and we don't get clock recovery, reset link training values

		 */

		if (intel_dp->train_set_valid) {

			DRM_DEBUG_KMS("clock recovery not ok, reset");

			/* clear the flag as we are not reusing train set */

			intel_dp->train_set_valid = false;

			if (!intel_dp_reset_link_train(intel_dp,

						       DP_TRAINING_PATTERN_1 |

						       DP_LINK_SCRAMBLING_DISABLE)) {

				DRM_ERROR("failed to enable link training\n");

				return;

			}

			continue;

		}



		/* Check to see if we've tried the max voltage */

		for (i = 0; i < intel_dp->lane_count; i++)

			if ((intel_dp->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0)
@@ -284,7 +266,6 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp) 
		/* Make sure clock is still ok */

		if (!drm_dp_clock_recovery_ok(link_status,

					      intel_dp->lane_count)) {

			intel_dp->train_set_valid = false;

			intel_dp_link_training_clock_recovery(intel_dp);

			intel_dp_set_link_train(intel_dp,

						training_pattern |
@@ -301,7 +282,6 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp) 


		/* Try 5 times, then try clock recovery if that fails */

		if (tries > 5) {

			intel_dp->train_set_valid = false;

			intel_dp_link_training_clock_recovery(intel_dp);

			intel_dp_set_link_train(intel_dp,

						training_pattern |
@@ -322,11 +302,9 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp) 


	intel_dp_set_idle_link_train(intel_dp);



	if (channel_eq) {

		intel_dp->train_set_valid = true;

	if (channel_eq)

		DRM_DEBUG_KMS("Channel EQ done. DP Training successful\n");

}

}



void intel_dp_stop_link_train(struct intel_dp *intel_dp)

{

drivers/gpu/drm/i915/intel_drv.h

+0 −2
Original line number Diff line number Diff line
@@ -863,8 +863,6 @@ struct intel_dp { 
	/* This is called before a link training is starterd */

	void (*prepare_link_retrain)(struct intel_dp *intel_dp);



	bool train_set_valid;



	/* Displayport compliance testing */

	unsigned long compliance_test_type;

	unsigned long compliance_test_data;

drivers/gpu/drm/i915/intel_fbc.c

+1 −2
Original line number Diff line number Diff line
@@ -824,8 +824,7 @@ static bool intel_fbc_can_choose(struct intel_crtc *crtc) 
{

	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;

	struct intel_fbc *fbc = &dev_priv->fbc;

	bool enable_by_default = IS_HASWELL(dev_priv) ||

				 IS_BROADWELL(dev_priv);

	bool enable_by_default = IS_BROADWELL(dev_priv);



	if (intel_vgpu_active(dev_priv->dev)) {

		fbc->no_fbc_reason = "VGPU is active";