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Commit c354dff0 authored by Devesh Sharma's avatar Devesh Sharma Committed by Jason Gunthorpe
Browse files

RDMA/bnxt_re: Fix incorrect DB offset calculation 



To support host systems with non 4K page size, l2_db_size shall be
calculated with 4096 instead of PAGE_SIZE. Also, supply the host page size
to FW during initialization.

Signed-off-by: default avatarDevesh Sharma <devesh.sharma@broadcom.com>
Signed-off-by: default avatarSelvin Xavier <selvin.xavier@broadcom.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@mellanox.com>
parent a45bc17b

drivers/infiniband/hw/bnxt_re/qplib_rcfw.c

+5 −1
Original line number Diff line number Diff line
@@ -460,7 +460,11 @@ int bnxt_qplib_init_rcfw(struct bnxt_qplib_rcfw *rcfw, 
	int rc;



	RCFW_CMD_PREP(req, INITIALIZE_FW, cmd_flags);



	/* Supply (log-base-2-of-host-page-size - base-page-shift)

	 * to bono to adjust the doorbell page sizes.

	 */

	req.log2_dbr_pg_size = cpu_to_le16(PAGE_SHIFT -

					   RCFW_DBR_BASE_PAGE_SHIFT);

	/*

	 * VFs need not setup the HW context area, PF

	 * shall setup this area for VF. Skipping the

drivers/infiniband/hw/bnxt_re/qplib_rcfw.h

+1 −0
Original line number Diff line number Diff line
@@ -49,6 +49,7 @@ 
#define RCFW_COMM_SIZE			0x104



#define RCFW_DBR_PCI_BAR_REGION		2

#define RCFW_DBR_BASE_PAGE_SHIFT	12



#define RCFW_CMD_PREP(req, CMD, cmd_flags)				\

	do {								\

drivers/infiniband/hw/bnxt_re/qplib_sp.c

+2 −1
Original line number Diff line number Diff line
@@ -139,7 +139,8 @@ int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw, 
	attr->max_pkey = le32_to_cpu(sb->max_pkeys);



	attr->max_inline_data = le32_to_cpu(sb->max_inline_data);

	attr->l2_db_size = (sb->l2_db_space_size + 1) * PAGE_SIZE;

	attr->l2_db_size = (sb->l2_db_space_size + 1) *

			    (0x01 << RCFW_DBR_BASE_PAGE_SHIFT);

	attr->max_sgid = le32_to_cpu(sb->max_gid);



	bnxt_qplib_query_version(rcfw, attr->fw_ver);

drivers/infiniband/hw/bnxt_re/roce_hsi.h

+24 −1
Original line number Diff line number Diff line
@@ -1761,7 +1761,30 @@ struct cmdq_initialize_fw { 
	#define CMDQ_INITIALIZE_FW_TIM_PG_SIZE_PG_2M		   (0x3UL << 4)

	#define CMDQ_INITIALIZE_FW_TIM_PG_SIZE_PG_8M		   (0x4UL << 4)

	#define CMDQ_INITIALIZE_FW_TIM_PG_SIZE_PG_1G		   (0x5UL << 4)

	__le16 reserved16;

	/* This value is (log-base-2-of-DBR-page-size - 12).

	 * 0 for 4KB. HW supported values are enumerated below.

	 */

	__le16  log2_dbr_pg_size;

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_MASK	0xfUL

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_SFT		0

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_4K	0x0UL

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_8K	0x1UL

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_16K	0x2UL

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_32K	0x3UL

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_64K	0x4UL

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_128K	0x5UL

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_256K	0x6UL

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_512K	0x7UL

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_1M	0x8UL

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_2M	0x9UL

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_4M	0xaUL

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_8M	0xbUL

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_16M	0xcUL

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_32M	0xdUL

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_64M	0xeUL

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_128M	0xfUL

	#define CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_LAST		\

			CMDQ_INITIALIZE_FW_LOG2_DBR_PG_SIZE_PG_128M

	__le64 qpc_page_dir;

	__le64 mrw_page_dir;

	__le64 srq_page_dir;