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Commit c2437b1f authored by Eric Bernstein's avatar Eric Bernstein Committed by Alex Deucher
Browse files

drm/amd/display: Expose bunch of functions from dcn10_hw_sequencer 



v2: Remove spurious newline changes

Signed-off-by: default avatarEric Bernstein <eric.bernstein@amd.com>
Reviewed-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e7baae1c

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

+34 −25
Original line number Diff line number Diff line
@@ -834,7 +834,7 @@ static bool dcn10_hw_wa_force_recovery(struct dc *dc) 
}





static void dcn10_verify_allow_pstate_change_high(struct dc *dc)

void dcn10_verify_allow_pstate_change_high(struct dc *dc)

{

	static bool should_log_hw_state; /* prevent hw state log by default */
@@ -1848,8 +1848,7 @@ static void update_dpp(struct dpp *dpp, struct dc_plane_state *plane_state) 
		dpp->funcs->dpp_program_bias_and_scale(dpp, &bns_params);

}





static void update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx)

static void dcn10_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx)

{

	struct hubp *hubp = pipe_ctx->plane_res.hubp;

	struct mpcc_blnd_cfg blnd_cfg;
@@ -1994,7 +1993,7 @@ static void update_dchubp_dpp( 


	if (plane_state->update_flags.bits.full_update ||

		plane_state->update_flags.bits.per_pixel_alpha_change)

		update_mpcc(dc, pipe_ctx);

		dc->hwss.update_mpcc(dc, pipe_ctx);



	if (plane_state->update_flags.bits.full_update ||

		plane_state->update_flags.bits.per_pixel_alpha_change ||
@@ -2104,27 +2103,11 @@ static void set_hdr_multiplier(struct pipe_ctx *pipe_ctx) 
			pipe_ctx->plane_res.dpp, hw_mult);

}



static void program_all_pipe_in_tree(

void dcn10_program_pipe(

		struct dc *dc,

		struct pipe_ctx *pipe_ctx,

		struct dc_state *context)

{

	if (pipe_ctx->top_pipe == NULL) {

		bool blank = !is_pipe_tree_visible(pipe_ctx);



		pipe_ctx->stream_res.tg->dlg_otg_param.vready_offset = pipe_ctx->pipe_dlg_param.vready_offset;

		pipe_ctx->stream_res.tg->dlg_otg_param.vstartup_start = pipe_ctx->pipe_dlg_param.vstartup_start;

		pipe_ctx->stream_res.tg->dlg_otg_param.vupdate_offset = pipe_ctx->pipe_dlg_param.vupdate_offset;

		pipe_ctx->stream_res.tg->dlg_otg_param.vupdate_width = pipe_ctx->pipe_dlg_param.vupdate_width;

		pipe_ctx->stream_res.tg->dlg_otg_param.signal =  pipe_ctx->stream->signal;



		pipe_ctx->stream_res.tg->funcs->program_global_sync(

				pipe_ctx->stream_res.tg);



		dc->hwss.blank_pixel_data(dc, pipe_ctx, blank);

	}



	if (pipe_ctx->plane_state != NULL) {

	if (pipe_ctx->plane_state->update_flags.bits.full_update)

		dcn10_enable_plane(dc, pipe_ctx, context);
@@ -2147,6 +2130,30 @@ static void program_all_pipe_in_tree( 
		dc->hwss.set_output_transfer_func(pipe_ctx, pipe_ctx->stream);

}



static void program_all_pipe_in_tree(

		struct dc *dc,

		struct pipe_ctx *pipe_ctx,

		struct dc_state *context)

{

	if (pipe_ctx->top_pipe == NULL) {

		bool blank = !is_pipe_tree_visible(pipe_ctx);



		pipe_ctx->stream_res.tg->dlg_otg_param.vready_offset = pipe_ctx->pipe_dlg_param.vready_offset;

		pipe_ctx->stream_res.tg->dlg_otg_param.vstartup_start = pipe_ctx->pipe_dlg_param.vstartup_start;

		pipe_ctx->stream_res.tg->dlg_otg_param.vupdate_offset = pipe_ctx->pipe_dlg_param.vupdate_offset;

		pipe_ctx->stream_res.tg->dlg_otg_param.vupdate_width = pipe_ctx->pipe_dlg_param.vupdate_width;

		pipe_ctx->stream_res.tg->dlg_otg_param.signal =  pipe_ctx->stream->signal;



		pipe_ctx->stream_res.tg->funcs->program_global_sync(

				pipe_ctx->stream_res.tg);



		dc->hwss.blank_pixel_data(dc, pipe_ctx, blank);

	}



	if (pipe_ctx->plane_state != NULL) {

		dcn10_program_pipe(dc, pipe_ctx, context);

	}



	if (pipe_ctx->bottom_pipe != NULL && pipe_ctx->bottom_pipe != pipe_ctx) {

		program_all_pipe_in_tree(dc, pipe_ctx->bottom_pipe, context);

	}
@@ -2269,7 +2276,7 @@ static void dcn10_apply_ctx_for_surface( 
			old_pipe_ctx->plane_state &&

			old_pipe_ctx->stream_res.tg == tg) {



			hwss1_plane_atomic_disconnect(dc, old_pipe_ctx);

			dc->hwss.plane_atomic_disconnect(dc, old_pipe_ctx);

			removed_pipe[i] = true;



			DC_LOG_DC("Reset mpcc for pipe %d\n",
@@ -2555,7 +2562,9 @@ static const struct hw_sequencer_funcs dcn10_funcs = { 
	.apply_ctx_to_hw = dce110_apply_ctx_to_hw,

	.apply_ctx_for_surface = dcn10_apply_ctx_for_surface,

	.update_plane_addr = dcn10_update_plane_addr,

	.plane_atomic_disconnect = hwss1_plane_atomic_disconnect,

	.update_dchub = dcn10_update_dchub,

	.update_mpcc = dcn10_update_mpcc,

	.update_pending_status = dcn10_update_pending_status,

	.set_input_transfer_func = dcn10_set_input_transfer_func,

	.set_output_transfer_func = dcn10_set_output_transfer_func,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h

+7 −0
Original line number Diff line number Diff line
@@ -39,4 +39,11 @@ bool is_rgb_cspace(enum dc_color_space output_color_space); 


void hwss1_plane_atomic_disconnect(struct dc *dc, struct pipe_ctx *pipe_ctx);



void dcn10_verify_allow_pstate_change_high(struct dc *dc);



void dcn10_program_pipe(

		struct dc *dc,

		struct pipe_ctx *pipe_ctx,

		struct dc_state *context);



#endif /* __DC_HWSS_DCN10_H__ */

drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h

+8 −0
Original line number Diff line number Diff line
@@ -102,10 +102,18 @@ struct hw_sequencer_funcs { 
		const struct dc *dc,

		struct pipe_ctx *pipe_ctx);



	void (*plane_atomic_disconnect)(

		struct dc *dc,

		struct pipe_ctx *pipe_ctx);



	void (*update_dchub)(

		struct dce_hwseq *hws,

		struct dchub_init_data *dh_data);



	void (*update_mpcc)(

		struct dc *dc,

		struct pipe_ctx *pipe_ctx);



	void (*update_pending_status)(

			struct pipe_ctx *pipe_ctx);