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Commit c1a7ca0d authored by Alex Deucher's avatar Alex Deucher
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drm/radeon/cayman: set VM max pfn at MC init 



No need to emit them at VM flush as we no longer use
variable sized page tables now that we support 2 level
page tables.  This matches the behavior of SI (which
does not support variable sized page tables).

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
parent 13e55c38

drivers/gpu/drm/radeon/ni.c

+1 −7
Original line number Diff line number Diff line
@@ -776,7 +776,7 @@ static int cayman_pcie_gart_enable(struct radeon_device *rdev) 
	 */

	for (i = 1; i < 8; i++) {

		WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR + (i << 2), 0);

		WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR + (i << 2), 0);

		WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR + (i << 2), rdev->vm_manager.max_pfn);

		WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2),

			rdev->gart.table_addr >> 12);

	}
@@ -1576,12 +1576,6 @@ void cayman_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) 
	if (vm == NULL)

		return;



	radeon_ring_write(ring, PACKET0(VM_CONTEXT0_PAGE_TABLE_START_ADDR + (vm->id << 2), 0));

	radeon_ring_write(ring, 0);



	radeon_ring_write(ring, PACKET0(VM_CONTEXT0_PAGE_TABLE_END_ADDR + (vm->id << 2), 0));

	radeon_ring_write(ring, rdev->vm_manager.max_pfn);



	radeon_ring_write(ring, PACKET0(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (vm->id << 2), 0));

	radeon_ring_write(ring, vm->pd_gpu_addr >> 12);