Loading fw/htt.h +47 −29 Original line number Diff line number Diff line Loading @@ -825,6 +825,8 @@ typedef enum { HTT_STATS_PDEV_RTT_HW_STATS_TAG = 196, /* htt_stats_pdev_rtt_hw_stats_tlv */ HTT_STATS_PDEV_RTT_TBR_SELFGEN_QUEUED_STATS_TAG = 197, /* htt_stats_pdev_rtt_tbr_selfgen_queued_stats_tlv */ HTT_STATS_PDEV_RTT_TBR_CMD_RESULT_STATS_TAG = 198, /* htt_stats_pdev_rtt_tbr_cmd_result_stats_tlv */ HTT_STATS_GTX_TAG = 199, /* htt_stats_gtx_tlv */ HTT_STATS_TX_PDEV_WIFI_RADAR_TAG = 200, /* htt_stats_tx_pdev_wifi_radar_tlv */ HTT_STATS_MAX_TAG, Loading Loading @@ -7171,33 +7173,35 @@ PREPACK struct htt_rx_ring_selection_cfg_t { * * The message would appear as follows: * * |31 26|25|24|23 22|21|20|19|18 16|15|14|13|12|11|10|9|8|7|6|5|4|3|2 0| * |--------+--+--+-----+--+--+--+-----+--+--+--+--+--+--+-+-+-+-+-+-+-+----| * | rsvd1 |PS|SS| ring_id | pdev_id | msg_type | * |-----------+--------+--------+-----+------------------------------------| * |31 28|27|26|25|24|23 22|21|20|19|18 16|15|14|13|12|11|10|9|8|7|6|5|4|3|2 0| * |-----+--+--+--+--+-----+--+--+--+-----+--+--+--+--+--+--+-+-+-+-+-+-+-+----| * |rsvd1|MF|TM|PS|SS| ring_id | pdev_id | msg_type | * |--------------+--------+--------+-----+------------------------------------| * | rsvd2 | DATA | CTRL | MGMT| ring_buffer_size | * |--------------------------------------+--+--+--+--+--+-+-+-+-+-+-+-+----| * |-----------------------------------------+--+--+--+--+--+-+-+-+-+-+-+-+----| * | | M| M| M| M| M|M|M|M|M|M|M|M| | * | | S| S| S| P| P|P|S|S|S|P|P|P| | * | | E| E| E| E| E|E|S|S|S|S|S|S| | * | rsvd3 | D| C| M| D| C|M|D|C|M|D|C|M| E | * |------------------------------------------------------------------------| * |---------------------------------------------------------------------------| * | tlv_filter_mask_in0 | * |------------------------------------------------------------------------| * |---------------------------------------------------------------------------| * | tlv_filter_mask_in1 | * |------------------------------------------------------------------------| * |---------------------------------------------------------------------------| * | tlv_filter_mask_in2 | * |------------------------------------------------------------------------| * |---------------------------------------------------------------------------| * | tlv_filter_mask_in3 | * |-----------------+-----------------+---------------------+--------------| * |--------------------+-----------------+---------------------+--------------| * | tx_msdu_start_wm | tx_queue_ext_wm | tx_peer_entry_wm |tx_fes_stup_wm| * |------------------------------------------------------------------------| * |---------------------------------------------------------------------------| * | pcu_ppdu_setup_word_mask | * |--------------------+--+--+--+-----+---------------------+--------------| * |-----------------------+--+--+--+-----+---------------------+--------------| * | rsvd4 | D| C| M| PT | rxpcu_usrsetp_wm |tx_mpdu_srt_wm| * |------------------------------------------------------------------------| * |---------------------------------------------------------------------------| * * Where: * MF = MAC address filtering enable * TM = tx monitor global enable * PS = pkt_swap * SS = status_swap * The message is interpreted as follows: Loading @@ -7216,7 +7220,9 @@ PREPACK struct htt_rx_ring_selection_cfg_t { * e.g. wmac_top_reg_seq_hwioreg.h * b'26 - tx_mon_global_en: Enable/Disable global register * configuration in Tx monitor module. * b'27:31 - rsvd1: reserved for future use * b'27 - mac_addr_filter_en: * Enable/Disable Mac Address based filter. * b'28:31 - rsvd1: reserved for future use * dword1 - b'0:15 - ring_buffer_size: size of bufferes referenced by rx ring, * in byte units. * Valid only for HW_TO_SW_RING and SW_TO_HW_RING Loading Loading @@ -7362,7 +7368,8 @@ PREPACK struct htt_tx_monitor_cfg_t { status_swap: 1, pkt_swap: 1, tx_mon_global_en: 1, rsvd1: 5; mac_addr_filter_en: 1, rsvd1: 4; A_UINT32 ring_buffer_size: 16, config_length_mgmt: 3, config_length_ctrl: 3, Loading Loading @@ -7465,6 +7472,17 @@ PREPACK struct htt_tx_monitor_cfg_t { ((_var) |= ((_val) << HTT_TX_MONITOR_CFG_TX_MON_GLOBAL_EN_S)); \ } while (0) #define HTT_TX_MONITOR_CFG_MAC_ADDR_FILTER_EN_M 0x08000000 #define HTT_TX_MONITOR_CFG_MAC_ADDR_FILTER_EN_S 27 #define HTT_TX_MONITOR_CFG_MAC_ADDR_FILTER_EN_GET(_var) \ (((_var) & HTT_TX_MONITOR_CFG_MAC_ADDR_FILTER_EN_M) >> \ HTT_TX_MONITOR_CFG_MAC_ADDR_FILTER_EN_S) #define HTT_TX_MONITOR_CFG_MAC_ADDR_FILTER_EN_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_TX_MONITOR_CFG_MAC_ADDR_FILTER_EN, _val); \ ((_var) |= ((_val) << HTT_TX_MONITOR_CFG_MAC_ADDR_FILTER_EN_S)); \ } while (0) #define HTT_TX_MONITOR_CFG_RING_BUFFER_SIZE_M 0x0000ffff #define HTT_TX_MONITOR_CFG_RING_BUFFER_SIZE_S 0 #define HTT_TX_MONITOR_CFG_RING_BUFFER_SIZE_GET(_var) \ Loading Loading @@ -21374,7 +21392,7 @@ PREPACK struct htt_t2h_sawf_msduq_event { #define HTT_T2H_SAWF_MSDUQ_INFO_HTT_TGT_OPAQUE_ID_M 0x00FFFFFF #define HTT_T2H_SAWF_MSDUQ_INFO_HTT_TGT_OPAQUE_ID_S 0 #define HTT_T2H_SAWF_MSDUQ_INFO_HTT_TGT_OPAQUE_ID_GET(_var) \ (((_var) & HTT_T2H_SAWF_MSDUQ_INFO_HTT_TGT_OPAQUE_ID) >> \ (((_var) & HTT_T2H_SAWF_MSDUQ_INFO_HTT_TGT_OPAQUE_ID_M) >> \ HTT_T2H_SAWF_MSDUQ_INFO_HTT_TGT_OPAQUE_ID_S) #define HTT_T2H_SAWF_MSDUQ_INFO_HTT_TGT_OPAQUE_ID_SET(_var, _val) \ do { \ Loading Loading @@ -22983,7 +23001,7 @@ PREPACK struct htt_t2h_sdwf_msduq_cfg_ind { #define HTT_T2H_MSG_TYPE_SDWF_MSDUQ_CFG_IND_HLOS_TID_GET(_var) \ (((_var) & HTT_T2H_MSG_TYPE_SDWF_MSDUQ_CFG_IND_HLOS_TID_M) >> \ HTT_T2H_MSG_TYPE_SDWF_MSDUQ_CFG_IND_HLOS_TID_S) #define HTT_T2H_MSG_TYPE_MSDUQ_CFG_IN_DHLOS_TID_SET(_var, _val) \ #define HTT_T2H_MSG_TYPE_SDWF_MSDUQ_CFG_IND_HLOS_TID_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_T2H_MSG_TYPE_SDWF_MSDUQ_CFG_IND_HLOS_TID, _val); \ ((_var) |= ((_val) << HTT_T2H_MSG_TYPE_SDWF_MSDUQ_CFG_IND_HLOS_TID_S)); \ fw/htt_stats.h +98 −0 Original line number Diff line number Diff line Loading @@ -668,6 +668,14 @@ enum htt_dbg_ext_stats_type { */ HTT_DBG_EXT_STATS_LATENCY_PROF_STATS_LO = 67, /** HTT_DBG_GTX_STATS * PARAMS: * - No Params * RESP MSG: * - htt_pdev_gtx_stats_tlv */ HTT_DBG_GTX_STATS = 68, /* keep this last */ HTT_DBG_NUM_EXT_STATS = 256, Loading Loading @@ -5580,6 +5588,8 @@ typedef struct { A_UINT32 extra_eht_ltf; /** Counter for Extra EHT LTFs in OFDMA sequences */ A_UINT32 extra_eht_ltf_ofdma; /** 11AX HE UL_BA RU Size stats */ A_UINT32 ofdma_ba_ru_size[HTT_TX_PDEV_STATS_NUM_AX_RU_SIZE_COUNTERS]; } htt_stats_tx_pdev_rate_stats_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_tx_pdev_rate_stats_tlv htt_tx_pdev_rate_stats_tlv; Loading Loading @@ -5668,6 +5678,7 @@ typedef struct { A_UINT32 be_ofdma_tx_ru_size[HTT_TX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS]; /** 11BE EHT DL MU OFDMA EHT-SIG MCS stats */ A_UINT32 be_ofdma_eht_sig_mcs[HTT_TX_PDEV_STATS_NUM_EHT_SIG_MCS_COUNTERS]; A_UINT32 be_ofdma_ba_ru_size[HTT_TX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS]; } htt_stats_tx_pdev_rate_stats_be_ofdma_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_tx_pdev_rate_stats_be_ofdma_tlv Loading Loading @@ -8590,6 +8601,82 @@ typedef struct { } htt_pdev_rtt_init_stats_t; #endif /* ATH_TARGET */ enum { HTT_STATS_WIFI_RADAR_CAL_TYPE_NONE = 0, HTT_STATS_WIFI_RADAR_CAL_TYPE_GAIN_BINARY_SEARCH = 1, HTT_STATS_WIFI_RADAR_CAL_TYPE_TX_GAIN_BINARY_SEARCH = 2, HTT_STATS_WIFI_RADAR_CAL_TYPE_RECAL_GAIN_VALIDATION = 3, HTT_STATS_WIFI_RADAR_CAL_TYPE_RECAL_GAIN_BINARY_SEARCH = 4, /* the value 5 is reserved for future use */ HTT_STATS_NUM_WIFI_RADAR_CAL_TYPES = 6 }; enum { HTT_STATS_WIFI_RADAR_CAL_FAILURE_NONE = 0, HTT_STATS_WIFI_RADAR_CAL_FAILURE_DPD_ABORT = 1, HTT_STATS_WIFI_RADAR_CAL_FAILURE_CONVERGENCE = 2, HTT_STATS_WIFI_RADAR_CAL_FAILURE_TX_EXCEEDS_RETRY = 3, HTT_STATS_WIFI_RADAR_CAL_FAILURE_CAPTURE = 4, HTT_STATS_WIFI_RADAR_CAL_FAILURE_NEW_CHANNEL_CHANGE = 5, HTT_STATS_WIFI_RADAR_CAL_FAILURE_NEW_CAL_REQ = 6, /* the values 7-9 are reserved for future use */ HTT_STATS_NUM_WIFI_RADAR_CAL_FAILURE_REASONS = 10 }; typedef struct { htt_tlv_hdr_t tlv_hdr; A_UINT32 capture_in_progress; A_UINT32 calibration_in_progress; /* Capture time interval, in ms */ A_UINT32 periodicity; /* Last user request timestamp, in ms */ A_UINT32 latest_req_timestamp; /* Last target res timestamp, in ms */ A_UINT32 latest_resp_timestamp; /* Time taken by last calibration to end, in ms */ A_UINT32 latest_calibration_timing; /* Time taken by last calibration to end, in ms for each chain */ A_UINT32 calibration_timing_per_chain[HTT_STATS_MAX_CHAINS]; /* To log user request count */ A_UINT32 wifi_radar_req_count; /* Total packet success count */ A_UINT32 num_wifi_radar_pkt_success; /* Total packet queued count */ A_UINT32 num_wifi_radar_pkt_queued; /* Total packet success count during latest calibration alone */ A_UINT32 num_wifi_radar_cal_pkt_success; /* Tx Gain Calibration Output - Initial Tx Gain index*/ A_UINT32 wifi_radar_cal_init_tx_gain; /* Last Calibration Type, refer to HTT_STATS_WIFI_RADAR_CAL_TYPE_ consts */ A_UINT32 latest_wifi_radar_cal_type; /* Calibration Type counters */ A_UINT32 wifi_radar_cal_type_counts[HTT_STATS_NUM_WIFI_RADAR_CAL_TYPES]; /* * Last Calibration Fail Reason, * refer to HTT_STATS_WIFI_RADAR_CAL_FAILURE_ consts */ A_UINT32 latest_wifi_radar_cal_fail_reason; /* Calibration Fail Reason counters */ A_UINT32 wifi_radar_cal_fail_reason_counts[HTT_STATS_NUM_WIFI_RADAR_CAL_FAILURE_REASONS]; /* WiFi Radar Licensed for SKU: 0 - No; 1 - Yes */ A_UINT32 wifi_radar_licensed; /* * cmd result to show failure count of CTS2SELF across MAX_CMD_RESULT * reasons */ A_UINT32 cmd_results_cts2self[HTT_STATS_MAX_SCH_CMD_RESULT]; /* * cmd result to show failure count of wifi radar across MAX_CMD_RESULT * reasons */ A_UINT32 cmd_results_wifi_radar[HTT_STATS_MAX_SCH_CMD_RESULT]; /* Tx gain index from gain table obtained/used for calibration */ A_UINT32 wifi_radar_tx_gains[HTT_STATS_MAX_CHAINS]; /* Rx gain index from gain table obtained/used from calibration */ A_UINT32 wifi_radar_rx_gains[HTT_STATS_MAX_CHAINS][HTT_STATS_MAX_CHAINS]; } htt_stats_tx_pdev_wifi_radar_tlv; /* STATS_TYPE : HTT_DBG_EXT_PKTLOG_AND_HTT_RING_STATS * TLV_TAGS: Loading Loading @@ -10464,6 +10551,7 @@ typedef struct _htt_odd_mandatory_muofdma_pdev_stats_tlv { A_UINT32 ax_mu_brp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS]; A_UINT32 be_mu_brp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS]; A_UINT32 ofdma_tx_ru_size[HTT_TX_PDEV_STATS_NUM_AX_RU_SIZE_COUNTERS]; A_UINT32 ofdma_ba_ru_size[HTT_TX_PDEV_STATS_NUM_AX_RU_SIZE_COUNTERS]; } htt_dbg_odd_mandatory_muofdma_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_dbg_odd_mandatory_muofdma_tlv Loading Loading @@ -11704,5 +11792,15 @@ static INLINE A_UINT8 *htt_ctrl_path_cal_type_id_to_name(A_UINT32 cal_type_id) } #endif /* HTT_CTRL_PATH_STATS_CAL_TYPE_STRINGS */ /*===================== Start GTX stats ====================*/ #define HTT_NUM_MCS_PER_NSS 16 typedef struct { htt_tlv_hdr_t tlv_hdr; A_UINT32 gtx_enabled; /* shows whether Green Tx feature is enabled */ A_INT32 mcs_tpc_min[HTT_NUM_MCS_PER_NSS]; /* shows current MCS's minimum TPC in 0.25dBm units */ A_INT32 mcs_tpc_max[HTT_NUM_MCS_PER_NSS]; /* shows current MCS's maximum TPC in 0.25dBm units */ A_UINT32 mcs_tpc_diff[HTT_NUM_MCS_PER_NSS]; /* shows current MCS's difference between maximum and minimum TPC in 0.25dB unit*/ } htt_stats_gtx_tlv; /*===================== End GTX stats ====================*/ #endif /* __HTT_STATS_H__ */ fw/txmon_tlvs.h +71 −1 Original line number Diff line number Diff line /* * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2022,2024 Qualcomm Innovation Center, Inc. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for * any purpose with or without fee is hereby granted, provided that the Loading Loading @@ -34,6 +34,22 @@ #define TXMON_FW2SW_MON_FES_SETUP_SCHEDULE_ID_M 0xffffffff #define TXMON_FW2SW_MON_FES_SETUP_SCHEDULE_ID_S 0 #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_M 0x000fffff #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_S 0 #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SEQ_NUM_M 0x000007ff #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SEQ_NUM_S 0 #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_HW_LINK_ID_M 0x00003800 #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_HW_LINK_ID_S 11 #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_PACKET_ID_M 0x0007c000 #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_PACKET_ID_S 14 #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_VALID_M 0x00080000 #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_VALID_S 19 #define TXMON_FW2SW_MON_FES_SETUP_BAND_CENTER_FREQ1_GET(_var) \ (((_var) & TXMON_FW2SW_MON_FES_SETUP_BAND_CENTER_FREQ1_M) >> \ TXMON_FW2SW_MON_FES_SETUP_BAND_CENTER_FREQ1_S) Loading Loading @@ -84,6 +100,58 @@ ((_var) |= ((_val) << TXMON_FW2SW_MON_FES_SETUP_SCHEDULE_ID_S)); \ } while (0) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_GET(_var) \ (((_var) & TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_M) >> \ TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_S) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE, _val); \ ((_var) |= ((_val) << TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_S)); \ } while (0) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SEQ_NUM_GET(_var) \ (((_var) & TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SEQ_NUM_M) >> \ TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SEQ_NUM_S) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SEQ_NUM_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SEQ_NUM, _val); \ ((_var) |= ((_val) << TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SEQ_NUM_S)); \ } while (0) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_HW_LINK_ID_GET(_var) \ (((_var) & TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_HW_LINK_ID_M) >> \ TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_HW_LINK_ID_S) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_HW_LINK_ID_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(TXMON_FW2SW_MON_FES_SETUP_FW_COOKIEHW_LINK_ID, _val); \ ((_var) |= ((_val) << TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_HW_LINK_ID_S)); \ } while (0) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_PACKET_ID_GET(_var) \ (((_var) & TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_PACKET_ID_M) >> \ TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_PACKET_ID_S) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_PACKET_ID_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_PACKET_ID, _val); \ ((_var) |= ((_val) << TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_PACKET_ID_S)); \ } while (0) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_VALID_GET(_var) \ (((_var) & TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_VALID_M) >> \ TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_VALID_S) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_VALID_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_VALID, _val); \ ((_var) |= ((_val) << TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_VALID_S)); \ } while (0) enum txmon_fw2sw_user_id { TXMON_FW2SW_TYPE_FES_SETUP = 0, /* Placed after FES_SETUP */ TXMON_FW2SW_TYPE_FES_SETUP_USER = 1, /* Placed before FES_SETUP_COMPLETE */ Loading @@ -98,6 +166,8 @@ typedef struct txmon_fw2sw_fes_setup { mhz : 16, reserved : 8; A_UINT32 schedule_id; A_UINT32 fw_cookie : 20, rsvd : 12; } txmon_fw2sw_fes_setup_t; typedef struct txmon_fw2sw_fes_setup_ext { Loading fw/wmi_services.h +2 −0 Original line number Diff line number Diff line Loading @@ -659,6 +659,8 @@ typedef enum { WMI_SERVICE_REG_CC_EXT2_EVENT_SUPPORT = 405, /* Indicate FW would send EXT2 REG_CC event having data which would be a continuation to EXT REG_CC event */ WMI_SERVICE_MLO_MODE2_RECOVERY_SUPPORTED = 406, /* Indicate FW support for MLO mode2 recovery */ WMI_SERVICE_MSDUQ_RECFG = 407, /* FW support the HTT MSDUQ_RECFG_REQ + MSDUQ_CFG_IND messages */ WMI_SERVICE_TRAFFIC_CONTEXT_SUPPORT = 408, /* FW supports traffic context aware manager */ WMI_SERVICE_STA_SAP_NDP_CONCURRENCY_SUPPORT = 409, /* FW supports STA + SAP + NDP concurrency */ WMI_MAX_EXT2_SERVICE Loading fw/wmi_tlv_defs.h +25 −1 Original line number Diff line number Diff line Loading @@ -1432,6 +1432,11 @@ typedef enum { WMITLV_TAG_STRUC_wmi_pdev_enable_xlna_event_fixed_param, WMITLV_TAG_STRUC_wmi_reg_chan_list_cc_event_ext2_fixed_param, WMITLV_TAG_STRUC_wmi_pdev_set_custom_tx_power_per_mcs_cmd_fixed_param, WMITLV_TAG_STRUC_wmi_peer_active_traffic_map_cmd_fixed_param, WMITLV_TAG_STRUC_wmi_request_opm_stats_cmd_fixed_param, WMITLV_TAG_STRUC_wmi_ctrl_path_vdev_bcn_tx_stats_struct, WMITLV_TAG_STRUC_wmi_ctrl_path_pdev_bcn_tx_stats_struct, WMITLV_TAG_STRUC_wmi_soc_tx_packet_custom_classify_cmd_fixed_param, } WMITLV_TAG_ID; /* * IMPORTANT: Please add _ALL_ WMI Commands Here. Loading Loading @@ -1978,6 +1983,9 @@ typedef enum { OP(WMI_PDEV_ENABLE_WIFI_RADAR_CMDID) \ OP(WMI_PDEV_ENABLE_XLNA_CMDID) \ OP(WMI_PDEV_SET_CUSTOM_TX_POWER_PER_MCS_CMDID) \ OP(WMI_PEER_ACTIVE_TRAFFIC_MAP_CMDID) \ OP(WMI_REQUEST_OPM_STATS_CMDID) \ OP(WMI_SOC_TX_PACKET_CUSTOM_CLASSIFY_CMDID) \ /* add new CMD_LIST elements above this line */ Loading Loading @@ -4773,6 +4781,10 @@ WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_update_pkt_routing_cmd_fixed_param, wmi_pdev_update_pkt_routing_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_UPDATE_PKT_ROUTING_CMDID); #define WMITLV_TABLE_WMI_SOC_TX_PACKET_CUSTOM_CLASSIFY_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_soc_tx_packet_custom_classify_cmd_fixed_param, wmi_soc_tx_packet_custom_classify_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_CREATE_PARAM_STRUC(WMI_SOC_TX_PACKET_CUSTOM_CLASSIFY_CMDID); /* Get cal version cmd */ #define WMITLV_TABLE_WMI_PDEV_CHECK_CAL_VERSION_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_check_cal_version_cmd_fixed_param, wmi_pdev_check_cal_version_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) Loading Loading @@ -5591,6 +5603,16 @@ WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_ENABLE_XLNA_CMDID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, txpower_bkoff_array, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SET_CUSTOM_TX_POWER_PER_MCS_CMDID); /* cmd to Set active traffic type bitmap */ #define WMITLV_TABLE_WMI_PEER_ACTIVE_TRAFFIC_MAP_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_active_traffic_map_cmd_fixed_param, wmi_peer_active_traffic_map_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_CREATE_PARAM_STRUC(WMI_PEER_ACTIVE_TRAFFIC_MAP_CMDID); /* cmd to request Opportunistic Power Mgmt (OPM) stats */ #define WMITLV_TABLE_WMI_REQUEST_OPM_STATS_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_request_opm_stats_cmd_fixed_param, wmi_request_opm_stats_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_CREATE_PARAM_STRUC(WMI_REQUEST_OPM_STATS_CMDID); /************************** TLV definitions of WMI events *******************************/ Loading Loading @@ -7079,7 +7101,9 @@ WMITLV_CREATE_PARAM_STRUC(WMI_PEER_STATS_INFO_EVENTID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_blanking_stats_struct, ctrl_path_blanking_stats, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_peer_stats_struct, ctrl_path_peer_stats, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_vdev_stats_struct, ctrl_path_vdev_stats, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_sta_rrm_stats_struct, ctrl_path_sta_rrm_stats, WMITLV_SIZE_VAR) WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_sta_rrm_stats_struct, ctrl_path_sta_rrm_stats, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_vdev_bcn_tx_stats_struct, ctrl_path_vdev_bcn_tx_stats, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_pdev_bcn_tx_stats_struct, ctrl_path_pdev_bcn_tx_stats, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_CTRL_PATH_STATS_EVENTID); /* Loading Loading
fw/htt.h +47 −29 Original line number Diff line number Diff line Loading @@ -825,6 +825,8 @@ typedef enum { HTT_STATS_PDEV_RTT_HW_STATS_TAG = 196, /* htt_stats_pdev_rtt_hw_stats_tlv */ HTT_STATS_PDEV_RTT_TBR_SELFGEN_QUEUED_STATS_TAG = 197, /* htt_stats_pdev_rtt_tbr_selfgen_queued_stats_tlv */ HTT_STATS_PDEV_RTT_TBR_CMD_RESULT_STATS_TAG = 198, /* htt_stats_pdev_rtt_tbr_cmd_result_stats_tlv */ HTT_STATS_GTX_TAG = 199, /* htt_stats_gtx_tlv */ HTT_STATS_TX_PDEV_WIFI_RADAR_TAG = 200, /* htt_stats_tx_pdev_wifi_radar_tlv */ HTT_STATS_MAX_TAG, Loading Loading @@ -7171,33 +7173,35 @@ PREPACK struct htt_rx_ring_selection_cfg_t { * * The message would appear as follows: * * |31 26|25|24|23 22|21|20|19|18 16|15|14|13|12|11|10|9|8|7|6|5|4|3|2 0| * |--------+--+--+-----+--+--+--+-----+--+--+--+--+--+--+-+-+-+-+-+-+-+----| * | rsvd1 |PS|SS| ring_id | pdev_id | msg_type | * |-----------+--------+--------+-----+------------------------------------| * |31 28|27|26|25|24|23 22|21|20|19|18 16|15|14|13|12|11|10|9|8|7|6|5|4|3|2 0| * |-----+--+--+--+--+-----+--+--+--+-----+--+--+--+--+--+--+-+-+-+-+-+-+-+----| * |rsvd1|MF|TM|PS|SS| ring_id | pdev_id | msg_type | * |--------------+--------+--------+-----+------------------------------------| * | rsvd2 | DATA | CTRL | MGMT| ring_buffer_size | * |--------------------------------------+--+--+--+--+--+-+-+-+-+-+-+-+----| * |-----------------------------------------+--+--+--+--+--+-+-+-+-+-+-+-+----| * | | M| M| M| M| M|M|M|M|M|M|M|M| | * | | S| S| S| P| P|P|S|S|S|P|P|P| | * | | E| E| E| E| E|E|S|S|S|S|S|S| | * | rsvd3 | D| C| M| D| C|M|D|C|M|D|C|M| E | * |------------------------------------------------------------------------| * |---------------------------------------------------------------------------| * | tlv_filter_mask_in0 | * |------------------------------------------------------------------------| * |---------------------------------------------------------------------------| * | tlv_filter_mask_in1 | * |------------------------------------------------------------------------| * |---------------------------------------------------------------------------| * | tlv_filter_mask_in2 | * |------------------------------------------------------------------------| * |---------------------------------------------------------------------------| * | tlv_filter_mask_in3 | * |-----------------+-----------------+---------------------+--------------| * |--------------------+-----------------+---------------------+--------------| * | tx_msdu_start_wm | tx_queue_ext_wm | tx_peer_entry_wm |tx_fes_stup_wm| * |------------------------------------------------------------------------| * |---------------------------------------------------------------------------| * | pcu_ppdu_setup_word_mask | * |--------------------+--+--+--+-----+---------------------+--------------| * |-----------------------+--+--+--+-----+---------------------+--------------| * | rsvd4 | D| C| M| PT | rxpcu_usrsetp_wm |tx_mpdu_srt_wm| * |------------------------------------------------------------------------| * |---------------------------------------------------------------------------| * * Where: * MF = MAC address filtering enable * TM = tx monitor global enable * PS = pkt_swap * SS = status_swap * The message is interpreted as follows: Loading @@ -7216,7 +7220,9 @@ PREPACK struct htt_rx_ring_selection_cfg_t { * e.g. wmac_top_reg_seq_hwioreg.h * b'26 - tx_mon_global_en: Enable/Disable global register * configuration in Tx monitor module. * b'27:31 - rsvd1: reserved for future use * b'27 - mac_addr_filter_en: * Enable/Disable Mac Address based filter. * b'28:31 - rsvd1: reserved for future use * dword1 - b'0:15 - ring_buffer_size: size of bufferes referenced by rx ring, * in byte units. * Valid only for HW_TO_SW_RING and SW_TO_HW_RING Loading Loading @@ -7362,7 +7368,8 @@ PREPACK struct htt_tx_monitor_cfg_t { status_swap: 1, pkt_swap: 1, tx_mon_global_en: 1, rsvd1: 5; mac_addr_filter_en: 1, rsvd1: 4; A_UINT32 ring_buffer_size: 16, config_length_mgmt: 3, config_length_ctrl: 3, Loading Loading @@ -7465,6 +7472,17 @@ PREPACK struct htt_tx_monitor_cfg_t { ((_var) |= ((_val) << HTT_TX_MONITOR_CFG_TX_MON_GLOBAL_EN_S)); \ } while (0) #define HTT_TX_MONITOR_CFG_MAC_ADDR_FILTER_EN_M 0x08000000 #define HTT_TX_MONITOR_CFG_MAC_ADDR_FILTER_EN_S 27 #define HTT_TX_MONITOR_CFG_MAC_ADDR_FILTER_EN_GET(_var) \ (((_var) & HTT_TX_MONITOR_CFG_MAC_ADDR_FILTER_EN_M) >> \ HTT_TX_MONITOR_CFG_MAC_ADDR_FILTER_EN_S) #define HTT_TX_MONITOR_CFG_MAC_ADDR_FILTER_EN_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_TX_MONITOR_CFG_MAC_ADDR_FILTER_EN, _val); \ ((_var) |= ((_val) << HTT_TX_MONITOR_CFG_MAC_ADDR_FILTER_EN_S)); \ } while (0) #define HTT_TX_MONITOR_CFG_RING_BUFFER_SIZE_M 0x0000ffff #define HTT_TX_MONITOR_CFG_RING_BUFFER_SIZE_S 0 #define HTT_TX_MONITOR_CFG_RING_BUFFER_SIZE_GET(_var) \ Loading Loading @@ -21374,7 +21392,7 @@ PREPACK struct htt_t2h_sawf_msduq_event { #define HTT_T2H_SAWF_MSDUQ_INFO_HTT_TGT_OPAQUE_ID_M 0x00FFFFFF #define HTT_T2H_SAWF_MSDUQ_INFO_HTT_TGT_OPAQUE_ID_S 0 #define HTT_T2H_SAWF_MSDUQ_INFO_HTT_TGT_OPAQUE_ID_GET(_var) \ (((_var) & HTT_T2H_SAWF_MSDUQ_INFO_HTT_TGT_OPAQUE_ID) >> \ (((_var) & HTT_T2H_SAWF_MSDUQ_INFO_HTT_TGT_OPAQUE_ID_M) >> \ HTT_T2H_SAWF_MSDUQ_INFO_HTT_TGT_OPAQUE_ID_S) #define HTT_T2H_SAWF_MSDUQ_INFO_HTT_TGT_OPAQUE_ID_SET(_var, _val) \ do { \ Loading Loading @@ -22983,7 +23001,7 @@ PREPACK struct htt_t2h_sdwf_msduq_cfg_ind { #define HTT_T2H_MSG_TYPE_SDWF_MSDUQ_CFG_IND_HLOS_TID_GET(_var) \ (((_var) & HTT_T2H_MSG_TYPE_SDWF_MSDUQ_CFG_IND_HLOS_TID_M) >> \ HTT_T2H_MSG_TYPE_SDWF_MSDUQ_CFG_IND_HLOS_TID_S) #define HTT_T2H_MSG_TYPE_MSDUQ_CFG_IN_DHLOS_TID_SET(_var, _val) \ #define HTT_T2H_MSG_TYPE_SDWF_MSDUQ_CFG_IND_HLOS_TID_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_T2H_MSG_TYPE_SDWF_MSDUQ_CFG_IND_HLOS_TID, _val); \ ((_var) |= ((_val) << HTT_T2H_MSG_TYPE_SDWF_MSDUQ_CFG_IND_HLOS_TID_S)); \
fw/htt_stats.h +98 −0 Original line number Diff line number Diff line Loading @@ -668,6 +668,14 @@ enum htt_dbg_ext_stats_type { */ HTT_DBG_EXT_STATS_LATENCY_PROF_STATS_LO = 67, /** HTT_DBG_GTX_STATS * PARAMS: * - No Params * RESP MSG: * - htt_pdev_gtx_stats_tlv */ HTT_DBG_GTX_STATS = 68, /* keep this last */ HTT_DBG_NUM_EXT_STATS = 256, Loading Loading @@ -5580,6 +5588,8 @@ typedef struct { A_UINT32 extra_eht_ltf; /** Counter for Extra EHT LTFs in OFDMA sequences */ A_UINT32 extra_eht_ltf_ofdma; /** 11AX HE UL_BA RU Size stats */ A_UINT32 ofdma_ba_ru_size[HTT_TX_PDEV_STATS_NUM_AX_RU_SIZE_COUNTERS]; } htt_stats_tx_pdev_rate_stats_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_tx_pdev_rate_stats_tlv htt_tx_pdev_rate_stats_tlv; Loading Loading @@ -5668,6 +5678,7 @@ typedef struct { A_UINT32 be_ofdma_tx_ru_size[HTT_TX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS]; /** 11BE EHT DL MU OFDMA EHT-SIG MCS stats */ A_UINT32 be_ofdma_eht_sig_mcs[HTT_TX_PDEV_STATS_NUM_EHT_SIG_MCS_COUNTERS]; A_UINT32 be_ofdma_ba_ru_size[HTT_TX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS]; } htt_stats_tx_pdev_rate_stats_be_ofdma_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_tx_pdev_rate_stats_be_ofdma_tlv Loading Loading @@ -8590,6 +8601,82 @@ typedef struct { } htt_pdev_rtt_init_stats_t; #endif /* ATH_TARGET */ enum { HTT_STATS_WIFI_RADAR_CAL_TYPE_NONE = 0, HTT_STATS_WIFI_RADAR_CAL_TYPE_GAIN_BINARY_SEARCH = 1, HTT_STATS_WIFI_RADAR_CAL_TYPE_TX_GAIN_BINARY_SEARCH = 2, HTT_STATS_WIFI_RADAR_CAL_TYPE_RECAL_GAIN_VALIDATION = 3, HTT_STATS_WIFI_RADAR_CAL_TYPE_RECAL_GAIN_BINARY_SEARCH = 4, /* the value 5 is reserved for future use */ HTT_STATS_NUM_WIFI_RADAR_CAL_TYPES = 6 }; enum { HTT_STATS_WIFI_RADAR_CAL_FAILURE_NONE = 0, HTT_STATS_WIFI_RADAR_CAL_FAILURE_DPD_ABORT = 1, HTT_STATS_WIFI_RADAR_CAL_FAILURE_CONVERGENCE = 2, HTT_STATS_WIFI_RADAR_CAL_FAILURE_TX_EXCEEDS_RETRY = 3, HTT_STATS_WIFI_RADAR_CAL_FAILURE_CAPTURE = 4, HTT_STATS_WIFI_RADAR_CAL_FAILURE_NEW_CHANNEL_CHANGE = 5, HTT_STATS_WIFI_RADAR_CAL_FAILURE_NEW_CAL_REQ = 6, /* the values 7-9 are reserved for future use */ HTT_STATS_NUM_WIFI_RADAR_CAL_FAILURE_REASONS = 10 }; typedef struct { htt_tlv_hdr_t tlv_hdr; A_UINT32 capture_in_progress; A_UINT32 calibration_in_progress; /* Capture time interval, in ms */ A_UINT32 periodicity; /* Last user request timestamp, in ms */ A_UINT32 latest_req_timestamp; /* Last target res timestamp, in ms */ A_UINT32 latest_resp_timestamp; /* Time taken by last calibration to end, in ms */ A_UINT32 latest_calibration_timing; /* Time taken by last calibration to end, in ms for each chain */ A_UINT32 calibration_timing_per_chain[HTT_STATS_MAX_CHAINS]; /* To log user request count */ A_UINT32 wifi_radar_req_count; /* Total packet success count */ A_UINT32 num_wifi_radar_pkt_success; /* Total packet queued count */ A_UINT32 num_wifi_radar_pkt_queued; /* Total packet success count during latest calibration alone */ A_UINT32 num_wifi_radar_cal_pkt_success; /* Tx Gain Calibration Output - Initial Tx Gain index*/ A_UINT32 wifi_radar_cal_init_tx_gain; /* Last Calibration Type, refer to HTT_STATS_WIFI_RADAR_CAL_TYPE_ consts */ A_UINT32 latest_wifi_radar_cal_type; /* Calibration Type counters */ A_UINT32 wifi_radar_cal_type_counts[HTT_STATS_NUM_WIFI_RADAR_CAL_TYPES]; /* * Last Calibration Fail Reason, * refer to HTT_STATS_WIFI_RADAR_CAL_FAILURE_ consts */ A_UINT32 latest_wifi_radar_cal_fail_reason; /* Calibration Fail Reason counters */ A_UINT32 wifi_radar_cal_fail_reason_counts[HTT_STATS_NUM_WIFI_RADAR_CAL_FAILURE_REASONS]; /* WiFi Radar Licensed for SKU: 0 - No; 1 - Yes */ A_UINT32 wifi_radar_licensed; /* * cmd result to show failure count of CTS2SELF across MAX_CMD_RESULT * reasons */ A_UINT32 cmd_results_cts2self[HTT_STATS_MAX_SCH_CMD_RESULT]; /* * cmd result to show failure count of wifi radar across MAX_CMD_RESULT * reasons */ A_UINT32 cmd_results_wifi_radar[HTT_STATS_MAX_SCH_CMD_RESULT]; /* Tx gain index from gain table obtained/used for calibration */ A_UINT32 wifi_radar_tx_gains[HTT_STATS_MAX_CHAINS]; /* Rx gain index from gain table obtained/used from calibration */ A_UINT32 wifi_radar_rx_gains[HTT_STATS_MAX_CHAINS][HTT_STATS_MAX_CHAINS]; } htt_stats_tx_pdev_wifi_radar_tlv; /* STATS_TYPE : HTT_DBG_EXT_PKTLOG_AND_HTT_RING_STATS * TLV_TAGS: Loading Loading @@ -10464,6 +10551,7 @@ typedef struct _htt_odd_mandatory_muofdma_pdev_stats_tlv { A_UINT32 ax_mu_brp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS]; A_UINT32 be_mu_brp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS]; A_UINT32 ofdma_tx_ru_size[HTT_TX_PDEV_STATS_NUM_AX_RU_SIZE_COUNTERS]; A_UINT32 ofdma_ba_ru_size[HTT_TX_PDEV_STATS_NUM_AX_RU_SIZE_COUNTERS]; } htt_dbg_odd_mandatory_muofdma_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_dbg_odd_mandatory_muofdma_tlv Loading Loading @@ -11704,5 +11792,15 @@ static INLINE A_UINT8 *htt_ctrl_path_cal_type_id_to_name(A_UINT32 cal_type_id) } #endif /* HTT_CTRL_PATH_STATS_CAL_TYPE_STRINGS */ /*===================== Start GTX stats ====================*/ #define HTT_NUM_MCS_PER_NSS 16 typedef struct { htt_tlv_hdr_t tlv_hdr; A_UINT32 gtx_enabled; /* shows whether Green Tx feature is enabled */ A_INT32 mcs_tpc_min[HTT_NUM_MCS_PER_NSS]; /* shows current MCS's minimum TPC in 0.25dBm units */ A_INT32 mcs_tpc_max[HTT_NUM_MCS_PER_NSS]; /* shows current MCS's maximum TPC in 0.25dBm units */ A_UINT32 mcs_tpc_diff[HTT_NUM_MCS_PER_NSS]; /* shows current MCS's difference between maximum and minimum TPC in 0.25dB unit*/ } htt_stats_gtx_tlv; /*===================== End GTX stats ====================*/ #endif /* __HTT_STATS_H__ */
fw/txmon_tlvs.h +71 −1 Original line number Diff line number Diff line /* * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2022,2024 Qualcomm Innovation Center, Inc. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for * any purpose with or without fee is hereby granted, provided that the Loading Loading @@ -34,6 +34,22 @@ #define TXMON_FW2SW_MON_FES_SETUP_SCHEDULE_ID_M 0xffffffff #define TXMON_FW2SW_MON_FES_SETUP_SCHEDULE_ID_S 0 #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_M 0x000fffff #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_S 0 #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SEQ_NUM_M 0x000007ff #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SEQ_NUM_S 0 #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_HW_LINK_ID_M 0x00003800 #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_HW_LINK_ID_S 11 #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_PACKET_ID_M 0x0007c000 #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_PACKET_ID_S 14 #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_VALID_M 0x00080000 #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_VALID_S 19 #define TXMON_FW2SW_MON_FES_SETUP_BAND_CENTER_FREQ1_GET(_var) \ (((_var) & TXMON_FW2SW_MON_FES_SETUP_BAND_CENTER_FREQ1_M) >> \ TXMON_FW2SW_MON_FES_SETUP_BAND_CENTER_FREQ1_S) Loading Loading @@ -84,6 +100,58 @@ ((_var) |= ((_val) << TXMON_FW2SW_MON_FES_SETUP_SCHEDULE_ID_S)); \ } while (0) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_GET(_var) \ (((_var) & TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_M) >> \ TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_S) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE, _val); \ ((_var) |= ((_val) << TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_S)); \ } while (0) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SEQ_NUM_GET(_var) \ (((_var) & TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SEQ_NUM_M) >> \ TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SEQ_NUM_S) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SEQ_NUM_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SEQ_NUM, _val); \ ((_var) |= ((_val) << TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_SEQ_NUM_S)); \ } while (0) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_HW_LINK_ID_GET(_var) \ (((_var) & TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_HW_LINK_ID_M) >> \ TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_HW_LINK_ID_S) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_HW_LINK_ID_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(TXMON_FW2SW_MON_FES_SETUP_FW_COOKIEHW_LINK_ID, _val); \ ((_var) |= ((_val) << TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_HW_LINK_ID_S)); \ } while (0) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_PACKET_ID_GET(_var) \ (((_var) & TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_PACKET_ID_M) >> \ TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_PACKET_ID_S) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_PACKET_ID_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_PACKET_ID, _val); \ ((_var) |= ((_val) << TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_PACKET_ID_S)); \ } while (0) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_VALID_GET(_var) \ (((_var) & TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_VALID_M) >> \ TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_VALID_S) #define TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_VALID_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_VALID, _val); \ ((_var) |= ((_val) << TXMON_FW2SW_MON_FES_SETUP_FW_COOKIE_VALID_S)); \ } while (0) enum txmon_fw2sw_user_id { TXMON_FW2SW_TYPE_FES_SETUP = 0, /* Placed after FES_SETUP */ TXMON_FW2SW_TYPE_FES_SETUP_USER = 1, /* Placed before FES_SETUP_COMPLETE */ Loading @@ -98,6 +166,8 @@ typedef struct txmon_fw2sw_fes_setup { mhz : 16, reserved : 8; A_UINT32 schedule_id; A_UINT32 fw_cookie : 20, rsvd : 12; } txmon_fw2sw_fes_setup_t; typedef struct txmon_fw2sw_fes_setup_ext { Loading
fw/wmi_services.h +2 −0 Original line number Diff line number Diff line Loading @@ -659,6 +659,8 @@ typedef enum { WMI_SERVICE_REG_CC_EXT2_EVENT_SUPPORT = 405, /* Indicate FW would send EXT2 REG_CC event having data which would be a continuation to EXT REG_CC event */ WMI_SERVICE_MLO_MODE2_RECOVERY_SUPPORTED = 406, /* Indicate FW support for MLO mode2 recovery */ WMI_SERVICE_MSDUQ_RECFG = 407, /* FW support the HTT MSDUQ_RECFG_REQ + MSDUQ_CFG_IND messages */ WMI_SERVICE_TRAFFIC_CONTEXT_SUPPORT = 408, /* FW supports traffic context aware manager */ WMI_SERVICE_STA_SAP_NDP_CONCURRENCY_SUPPORT = 409, /* FW supports STA + SAP + NDP concurrency */ WMI_MAX_EXT2_SERVICE Loading
fw/wmi_tlv_defs.h +25 −1 Original line number Diff line number Diff line Loading @@ -1432,6 +1432,11 @@ typedef enum { WMITLV_TAG_STRUC_wmi_pdev_enable_xlna_event_fixed_param, WMITLV_TAG_STRUC_wmi_reg_chan_list_cc_event_ext2_fixed_param, WMITLV_TAG_STRUC_wmi_pdev_set_custom_tx_power_per_mcs_cmd_fixed_param, WMITLV_TAG_STRUC_wmi_peer_active_traffic_map_cmd_fixed_param, WMITLV_TAG_STRUC_wmi_request_opm_stats_cmd_fixed_param, WMITLV_TAG_STRUC_wmi_ctrl_path_vdev_bcn_tx_stats_struct, WMITLV_TAG_STRUC_wmi_ctrl_path_pdev_bcn_tx_stats_struct, WMITLV_TAG_STRUC_wmi_soc_tx_packet_custom_classify_cmd_fixed_param, } WMITLV_TAG_ID; /* * IMPORTANT: Please add _ALL_ WMI Commands Here. Loading Loading @@ -1978,6 +1983,9 @@ typedef enum { OP(WMI_PDEV_ENABLE_WIFI_RADAR_CMDID) \ OP(WMI_PDEV_ENABLE_XLNA_CMDID) \ OP(WMI_PDEV_SET_CUSTOM_TX_POWER_PER_MCS_CMDID) \ OP(WMI_PEER_ACTIVE_TRAFFIC_MAP_CMDID) \ OP(WMI_REQUEST_OPM_STATS_CMDID) \ OP(WMI_SOC_TX_PACKET_CUSTOM_CLASSIFY_CMDID) \ /* add new CMD_LIST elements above this line */ Loading Loading @@ -4773,6 +4781,10 @@ WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_update_pkt_routing_cmd_fixed_param, wmi_pdev_update_pkt_routing_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_UPDATE_PKT_ROUTING_CMDID); #define WMITLV_TABLE_WMI_SOC_TX_PACKET_CUSTOM_CLASSIFY_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_soc_tx_packet_custom_classify_cmd_fixed_param, wmi_soc_tx_packet_custom_classify_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_CREATE_PARAM_STRUC(WMI_SOC_TX_PACKET_CUSTOM_CLASSIFY_CMDID); /* Get cal version cmd */ #define WMITLV_TABLE_WMI_PDEV_CHECK_CAL_VERSION_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_check_cal_version_cmd_fixed_param, wmi_pdev_check_cal_version_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) Loading Loading @@ -5591,6 +5603,16 @@ WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_ENABLE_XLNA_CMDID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, txpower_bkoff_array, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SET_CUSTOM_TX_POWER_PER_MCS_CMDID); /* cmd to Set active traffic type bitmap */ #define WMITLV_TABLE_WMI_PEER_ACTIVE_TRAFFIC_MAP_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_active_traffic_map_cmd_fixed_param, wmi_peer_active_traffic_map_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_CREATE_PARAM_STRUC(WMI_PEER_ACTIVE_TRAFFIC_MAP_CMDID); /* cmd to request Opportunistic Power Mgmt (OPM) stats */ #define WMITLV_TABLE_WMI_REQUEST_OPM_STATS_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_request_opm_stats_cmd_fixed_param, wmi_request_opm_stats_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_CREATE_PARAM_STRUC(WMI_REQUEST_OPM_STATS_CMDID); /************************** TLV definitions of WMI events *******************************/ Loading Loading @@ -7079,7 +7101,9 @@ WMITLV_CREATE_PARAM_STRUC(WMI_PEER_STATS_INFO_EVENTID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_blanking_stats_struct, ctrl_path_blanking_stats, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_peer_stats_struct, ctrl_path_peer_stats, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_vdev_stats_struct, ctrl_path_vdev_stats, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_sta_rrm_stats_struct, ctrl_path_sta_rrm_stats, WMITLV_SIZE_VAR) WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_sta_rrm_stats_struct, ctrl_path_sta_rrm_stats, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_vdev_bcn_tx_stats_struct, ctrl_path_vdev_bcn_tx_stats, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_pdev_bcn_tx_stats_struct, ctrl_path_pdev_bcn_tx_stats, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_CTRL_PATH_STATS_EVENTID); /* Loading