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Commit c106c7a5 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2017-09-20' of... 

Merge tag 'drm-intel-fixes-2017-09-20' of git://anongit.freedesktop.org/git/drm-intel into drm-fixes

drm/i915 fixes for 4.14-rc1

Couple fixes for stable:

- Fix MIPI panels on BXT.
- Fix PCI BARs information on GVT.

Plus other fixes:

- Fix minimal brightness for BXT, GLK, CFL and CNL.
- Fix compilation warning: unused in_vbl
- Fix error handling in intel_framebuffer_init

* tag 'drm-intel-fixes-2017-09-20' of git://anongit.freedesktop.org/git/drm-intel:
  drm/i915: Remove unused 'in_vbl' from i915_get_crtc_scanoutpos()
  drm/i915/cnp: set min brightness from VBT
  Revert "drm/i915/bxt: Disable device ready before shutdown command"
  drm/i915/bxt: set min brightness from VBT
  drm/i915: Fix an error handling in 'intel_framebuffer_init()'
  drm/i915/gvt: Fix incorrect PCI BARs reporting
parents 134dd2e6 99df13b6

drivers/gpu/drm/i915/gvt/cfg_space.c

+48 −65
Original line number Diff line number Diff line
@@ -197,19 +197,14 @@ static int emulate_pci_command_write(struct intel_vgpu *vgpu, 
static int emulate_pci_bar_write(struct intel_vgpu *vgpu, unsigned int offset,

	void *p_data, unsigned int bytes)

{

	unsigned int bar_index =

		(rounddown(offset, 8) % PCI_BASE_ADDRESS_0) / 8;

	u32 new = *(u32 *)(p_data);

	bool lo = IS_ALIGNED(offset, 8);

	u64 size;

	int ret = 0;

	bool mmio_enabled =

		vgpu_cfg_space(vgpu)[PCI_COMMAND] & PCI_COMMAND_MEMORY;

	struct intel_vgpu_pci_bar *bars = vgpu->cfg_space.bar;



	if (WARN_ON(bar_index >= INTEL_GVT_PCI_BAR_MAX))

		return -EINVAL;



	if (new == 0xffffffff) {

	/*

	 * Power-up software can determine how much address

	 * space the device requires by writing a value of
@@ -217,58 +212,50 @@ static int emulate_pci_bar_write(struct intel_vgpu *vgpu, unsigned int offset, 
	 * back. The device will return 0's in all don't-care

	 * address bits.

	 */

		size = vgpu->cfg_space.bar[bar_index].size;

		if (lo) {

			new = rounddown(new, size);

		} else {

			u32 val = vgpu_cfg_space(vgpu)[rounddown(offset, 8)];

			/* for 32bit mode bar it returns all-0 in upper 32

			 * bit, for 64bit mode bar it will calculate the

			 * size with lower 32bit and return the corresponding

			 * value

			 */

			if (val & PCI_BASE_ADDRESS_MEM_TYPE_64)

				new &= (~(size-1)) >> 32;

			else

				new = 0;

		}

	if (new == 0xffffffff) {

		switch (offset) {

		case PCI_BASE_ADDRESS_0:

		case PCI_BASE_ADDRESS_1:

			size = ~(bars[INTEL_GVT_PCI_BAR_GTTMMIO].size -1);

			intel_vgpu_write_pci_bar(vgpu, offset,

						size >> (lo ? 0 : 32), lo);

			/*

		 * Unmapp & untrap the BAR, since guest hasn't configured a

			 * Untrap the BAR, since guest hasn't configured a

			 * valid GPA

			 */

		switch (bar_index) {

		case INTEL_GVT_PCI_BAR_GTTMMIO:

			ret = trap_gttmmio(vgpu, false);

			break;

		case INTEL_GVT_PCI_BAR_APERTURE:

		case PCI_BASE_ADDRESS_2:

		case PCI_BASE_ADDRESS_3:

			size = ~(bars[INTEL_GVT_PCI_BAR_APERTURE].size -1);

			intel_vgpu_write_pci_bar(vgpu, offset,

						size >> (lo ? 0 : 32), lo);

			ret = map_aperture(vgpu, false);

			break;

		default:

			/* Unimplemented BARs */

			intel_vgpu_write_pci_bar(vgpu, offset, 0x0, false);

		}

		intel_vgpu_write_pci_bar(vgpu, offset, new, lo);

	} else {

		switch (offset) {

		case PCI_BASE_ADDRESS_0:

		case PCI_BASE_ADDRESS_1:

			/*

		 * Unmapp & untrap the old BAR first, since guest has

			 * Untrap the old BAR first, since guest has

			 * re-configured the BAR

			 */

		switch (bar_index) {

		case INTEL_GVT_PCI_BAR_GTTMMIO:

			ret = trap_gttmmio(vgpu, false);

			break;

		case INTEL_GVT_PCI_BAR_APERTURE:

			ret = map_aperture(vgpu, false);

			break;

		}

			trap_gttmmio(vgpu, false);

			intel_vgpu_write_pci_bar(vgpu, offset, new, lo);

		/* Track the new BAR */

		if (mmio_enabled) {

			switch (bar_index) {

			case INTEL_GVT_PCI_BAR_GTTMMIO:

				ret = trap_gttmmio(vgpu, true);

			ret = trap_gttmmio(vgpu, mmio_enabled);

			break;

			case INTEL_GVT_PCI_BAR_APERTURE:

				ret = map_aperture(vgpu, true);

		case PCI_BASE_ADDRESS_2:

		case PCI_BASE_ADDRESS_3:

			map_aperture(vgpu, false);

			intel_vgpu_write_pci_bar(vgpu, offset, new, lo);

			ret = map_aperture(vgpu, mmio_enabled);

			break;

			}

		default:

			intel_vgpu_write_pci_bar(vgpu, offset, new, lo);

		}

	}

	return ret;
@@ -299,10 +286,7 @@ int intel_vgpu_emulate_cfg_write(struct intel_vgpu *vgpu, unsigned int offset, 
	}



	switch (rounddown(offset, 4)) {

	case PCI_BASE_ADDRESS_0:

	case PCI_BASE_ADDRESS_1:

	case PCI_BASE_ADDRESS_2:

	case PCI_BASE_ADDRESS_3:

	case PCI_BASE_ADDRESS_0 ... PCI_BASE_ADDRESS_5:

		if (WARN_ON(!IS_ALIGNED(offset, 4)))

			return -EINVAL;

		return emulate_pci_bar_write(vgpu, offset, p_data, bytes);
@@ -344,7 +328,6 @@ void intel_vgpu_init_cfg_space(struct intel_vgpu *vgpu, 
	struct intel_gvt *gvt = vgpu->gvt;

	const struct intel_gvt_device_info *info = &gvt->device_info;

	u16 *gmch_ctl;

	int i;



	memcpy(vgpu_cfg_space(vgpu), gvt->firmware.cfg_space,

	       info->cfg_space_size);
@@ -371,13 +354,13 @@ void intel_vgpu_init_cfg_space(struct intel_vgpu *vgpu, 
	 */

	memset(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_1, 0, 4);

	memset(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_3, 0, 4);

	memset(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_4, 0, 8);

	memset(vgpu_cfg_space(vgpu) + INTEL_GVT_PCI_OPREGION, 0, 4);



	for (i = 0; i < INTEL_GVT_MAX_BAR_NUM; i++) {

		vgpu->cfg_space.bar[i].size = pci_resource_len(

					      gvt->dev_priv->drm.pdev, i * 2);

		vgpu->cfg_space.bar[i].tracked = false;

	}

	vgpu->cfg_space.bar[INTEL_GVT_PCI_BAR_GTTMMIO].size =

				pci_resource_len(gvt->dev_priv->drm.pdev, 0);

	vgpu->cfg_space.bar[INTEL_GVT_PCI_BAR_APERTURE].size =

				pci_resource_len(gvt->dev_priv->drm.pdev, 2);

}



/**

drivers/gpu/drm/i915/i915_irq.c

+0 −3
Original line number Diff line number Diff line
@@ -839,7 +839,6 @@ static bool i915_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe, 
								pipe);

	int position;

	int vbl_start, vbl_end, hsync_start, htotal, vtotal;

	bool in_vbl = true;

	unsigned long irqflags;



	if (WARN_ON(!mode->crtc_clock)) {
@@ -922,8 +921,6 @@ static bool i915_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe, 


	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);



	in_vbl = position >= vbl_start && position < vbl_end;



	/*

	 * While in vblank, position will be negative

	 * counting up towards 0 at vbl_end. And outside

drivers/gpu/drm/i915/intel_display.c

+1 −1
Original line number Diff line number Diff line
@@ -14030,7 +14030,7 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, 


		if (mode_cmd->handles[i] != mode_cmd->handles[0]) {

			DRM_DEBUG_KMS("bad plane %d handle\n", i);

			return -EINVAL;

			goto err;

		}



		stride_alignment = intel_fb_stride_alignment(fb, i);

drivers/gpu/drm/i915/intel_dsi.c

+0 −11
Original line number Diff line number Diff line
@@ -892,8 +892,6 @@ static void intel_dsi_disable(struct intel_encoder *encoder, 
			      struct intel_crtc_state *old_crtc_state,

			      struct drm_connector_state *old_conn_state)

{

	struct drm_device *dev = encoder->base.dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);

	enum port port;
@@ -902,15 +900,6 @@ static void intel_dsi_disable(struct intel_encoder *encoder, 
	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_OFF);

	intel_panel_disable_backlight(old_conn_state);



	/*

	 * Disable Device ready before the port shutdown in order

	 * to avoid split screen

	 */

	if (IS_BROXTON(dev_priv)) {

		for_each_dsi_port(port, intel_dsi->ports)

			I915_WRITE(MIPI_DEVICE_READY(port), 0);

	}



	/*

	 * According to the spec we should send SHUTDOWN before

	 * MIPI_SEQ_DISPLAY_OFF only for v3+ VBTs, but field testing

drivers/gpu/drm/i915/intel_panel.c

+4 −0
Original line number Diff line number Diff line
@@ -1699,6 +1699,8 @@ bxt_setup_backlight(struct intel_connector *connector, enum pipe unused) 
	if (!panel->backlight.max)

		return -ENODEV;



	panel->backlight.min = get_backlight_min_vbt(connector);



	val = bxt_get_backlight(connector);

	val = intel_panel_compute_brightness(connector, val);

	panel->backlight.level = clamp(val, panel->backlight.min,
@@ -1735,6 +1737,8 @@ cnp_setup_backlight(struct intel_connector *connector, enum pipe unused) 
	if (!panel->backlight.max)

		return -ENODEV;



	panel->backlight.min = get_backlight_min_vbt(connector);



	val = bxt_get_backlight(connector);

	val = intel_panel_compute_brightness(connector, val);

	panel->backlight.level = clamp(val, panel->backlight.min,