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Commit c0fb262b authored by Arun Kumar K's avatar Arun Kumar K Committed by Kukjin Kim
Browse files

clk: exynos5420: Add IDs for clocks used in PD mfc 



Adds IDs for MUX clocks to be used by power domain for MFC
for doing re-parenting while pd on/off.

Signed-off-by: default avatarArun Kumar K <arun.kk@samsung.com>
Signed-off-by: default avatarShaik Ameer Basha <shaik.ameer@samsung.com>
Acked-by: default avatarTomasz Figa <t.figa@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent c760569d

drivers/clk/samsung/clk-exynos5420.c

+4 −2
Original line number Diff line number Diff line
@@ -631,7 +631,8 @@ static struct samsung_mux_clock exynos5x_mux_clks[] __initdata = { 
			SRC_TOP4, 16, 1),

	MUX(0, "mout_user_aclk266", mout_user_aclk266_p, SRC_TOP4, 20, 1),

	MUX(0, "mout_user_aclk166", mout_user_aclk166_p, SRC_TOP4, 24, 1),

	MUX(0, "mout_user_aclk333", mout_user_aclk333_p, SRC_TOP4, 28, 1),

	MUX(CLK_MOUT_USER_ACLK333, "mout_user_aclk333", mout_user_aclk333_p,

			SRC_TOP4, 28, 1),



	MUX(0, "mout_user_aclk400_disp1", mout_user_aclk400_disp1_p,

			SRC_TOP5, 0, 1),
@@ -684,7 +685,8 @@ static struct samsung_mux_clock exynos5x_mux_clks[] __initdata = { 
			SRC_TOP11, 12, 1),

	MUX(0, "mout_sw_aclk266", mout_sw_aclk266_p, SRC_TOP11, 20, 1),

	MUX(0, "mout_sw_aclk166", mout_sw_aclk166_p, SRC_TOP11, 24, 1),

	MUX(0, "mout_sw_aclk333", mout_sw_aclk333_p, SRC_TOP11, 28, 1),

	MUX(CLK_MOUT_SW_ACLK333, "mout_sw_aclk333", mout_sw_aclk333_p,

			SRC_TOP11, 28, 1),



	MUX(0, "mout_sw_aclk400_disp1", mout_sw_aclk400_disp1_p,

			SRC_TOP12, 4, 1),

include/dt-bindings/clock/exynos5420.h

+2 −0
Original line number Diff line number Diff line
@@ -203,6 +203,8 @@ 
#define CLK_MOUT_G3D		641

#define CLK_MOUT_VPLL		642

#define CLK_MOUT_MAUDIO0	643

#define CLK_MOUT_USER_ACLK333	644

#define CLK_MOUT_SW_ACLK333	645



/* divider clocks */

#define CLK_DOUT_PIXEL		768