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Commit c0c1d3d7 authored by Oren Duer's avatar Oren Duer Committed by Roland Dreier
Browse files

IB/mlx4: Put priority bits in WQE of IBoE MLX QP 



Otherwise CM packets going over MLX QP1 get fixed scheduling priority 0.
We want CM packets to get the same scheduling priority, and therefore
map to the same SQ (Schedule Queue) and eventually TC (Traffic Class),
as the application requested for the actual QP used for the connection.

Signed-off-by: default avatarOren Duer <oren@mellanox.co.il>
Signed-off-by: default avatarOr Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: default avatarRoland Dreier <roland@purestorage.com>
parent d48b97b4

drivers/infiniband/hw/mlx4/qp.c

+3 −3
Original line number Diff line number Diff line
@@ -1424,6 +1424,9 @@ static int build_mlx_header(struct mlx4_ib_sqp *sqp, struct ib_send_wr *wr, 


	if (is_eth) {

		u8 *smac;

		u16 pcp = (be32_to_cpu(ah->av.ib.sl_tclass_flowlabel) >> 29) << 13;



		mlx->sched_prio = cpu_to_be16(pcp);



		memcpy(sqp->ud_header.eth.dmac_h, ah->av.eth.mac, 6);

		/* FIXME: cache smac value? */
@@ -1434,10 +1437,7 @@ static int build_mlx_header(struct mlx4_ib_sqp *sqp, struct ib_send_wr *wr, 
		if (!is_vlan) {

			sqp->ud_header.eth.type = cpu_to_be16(MLX4_IB_IBOE_ETHERTYPE);

		} else {

			u16 pcp;



			sqp->ud_header.vlan.type = cpu_to_be16(MLX4_IB_IBOE_ETHERTYPE);

			pcp = (be32_to_cpu(ah->av.ib.sl_tclass_flowlabel) >> 29) << 13;

			sqp->ud_header.vlan.tag = cpu_to_be16(vlan | pcp);

		}

	} else {

include/linux/mlx4/qp.h

+2 −1
Original line number Diff line number Diff line
@@ -233,7 +233,8 @@ struct mlx4_wqe_mlx_seg { 
	u8			owner;

	u8			reserved1[2];

	u8			opcode;

	u8			reserved2[3];

	__be16			sched_prio;

	u8			reserved2;

	u8			size;

	/*

	 * [17]    VL15