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Commit c0250fe5 authored by Chunfeng Yun's avatar Chunfeng Yun Committed by Kishon Vijay Abraham I
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phy: phy-mt65xx-usb3: disable 100uA extraction from SS port to HS port 



There will be a problem if SS port is diasbled and HS port extracts
100uA from SS port, so disable extract 100uA from SS port in the case,
when disable it, PA0_RG_USB20_INTR_EN should be set, otherwise HS port
only works on LS.

Signed-off-by: default avatarChunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
parent 8d6e1957

drivers/phy/phy-mt65xx-usb3.c

+10 −14
Original line number Original line Diff line number Diff line
@@ -46,6 +46,7 @@ 




#define U3P_USBPHYACR0		0x000

#define U3P_USBPHYACR0		0x000

#define PA0_RG_U2PLL_FORCE_ON		BIT(15)

#define PA0_RG_U2PLL_FORCE_ON		BIT(15)

#define PA0_RG_USB20_INTR_EN		BIT(5)





#define U3P_USBPHYACR2		0x008

#define U3P_USBPHYACR2		0x008

#define PA2_RG_SIF_U2PLL_FORCE_EN	BIT(18)

#define PA2_RG_SIF_U2PLL_FORCE_EN	BIT(18)
@@ -339,6 +340,15 @@ static void phy_instance_init(struct mt65xx_u3phy *u3phy, 
	tmp &= ~P2C_RG_UART_EN;

	tmp &= ~P2C_RG_UART_EN;

	writel(tmp, com + U3P_U2PHYDTM1);

	writel(tmp, com + U3P_U2PHYDTM1);





	tmp = readl(com + U3P_USBPHYACR0);

	tmp |= PA0_RG_USB20_INTR_EN;

	writel(tmp, com + U3P_USBPHYACR0);



	/* disable switch 100uA current to SSUSB */

	tmp = readl(com + U3P_USBPHYACR5);

	tmp &= ~PA5_RG_U2_HS_100U_U3_EN;

	writel(tmp, com + U3P_USBPHYACR5);



	if (!index) {

	if (!index) {

		tmp = readl(com + U3P_U2PHYACR4);

		tmp = readl(com + U3P_U2PHYACR4);

		tmp &= ~P2C_U2_GPIO_CTR_MSK;

		tmp &= ~P2C_U2_GPIO_CTR_MSK;
@@ -393,13 +403,6 @@ static void phy_instance_power_on(struct mt65xx_u3phy *u3phy, 
	tmp |= PA6_RG_U2_OTG_VBUSCMP_EN;

	tmp |= PA6_RG_U2_OTG_VBUSCMP_EN;

	writel(tmp, com + U3P_USBPHYACR6);

	writel(tmp, com + U3P_USBPHYACR6);





	if (!index) {

		/* switch 100uA current to SSUSB */

		tmp = readl(com + U3P_USBPHYACR5);

		tmp |= PA5_RG_U2_HS_100U_U3_EN;

		writel(tmp, com + U3P_USBPHYACR5);

	}



	tmp = readl(com + U3P_U2PHYDTM1);

	tmp = readl(com + U3P_U2PHYDTM1);

	tmp |= P2C_RG_VBUSVALID | P2C_RG_AVALID;

	tmp |= P2C_RG_VBUSVALID | P2C_RG_AVALID;

	tmp &= ~P2C_RG_SESSEND;

	tmp &= ~P2C_RG_SESSEND;
@@ -435,13 +438,6 @@ static void phy_instance_power_off(struct mt65xx_u3phy *u3phy, 
	tmp &= ~PA6_RG_U2_OTG_VBUSCMP_EN;

	tmp &= ~PA6_RG_U2_OTG_VBUSCMP_EN;

	writel(tmp, com + U3P_USBPHYACR6);

	writel(tmp, com + U3P_USBPHYACR6);





	if (!index) {

		/* switch 100uA current back to USB2.0 */

		tmp = readl(com + U3P_USBPHYACR5);

		tmp &= ~PA5_RG_U2_HS_100U_U3_EN;

		writel(tmp, com + U3P_USBPHYACR5);

	}



	/* let suspendm=0, set utmi into analog power down */

	/* let suspendm=0, set utmi into analog power down */

	tmp = readl(com + U3P_U2PHYDTM0);

	tmp = readl(com + U3P_U2PHYDTM0);

	tmp &= ~P2C_RG_SUSPENDM;

	tmp &= ~P2C_RG_SUSPENDM;