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Commit bfca1a91 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "msm: camera: ife: Enable sample drop on CSID RDI paths"

parents 02ec3dec 615273d1
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+7 −0
Original line number Diff line number Diff line
@@ -1568,6 +1568,7 @@ static int cam_ife_hw_mgr_acquire_res_ife_csid_pxl(
		csid_acquire.out_port = in_port->data;
		csid_acquire.node_res = NULL;
		csid_acquire.crop_enable = crop_enable;
		csid_acquire.drop_enable = false;

		hw_intf = cid_res->hw_res[i]->hw_intf;

@@ -1697,6 +1698,12 @@ static int cam_ife_hw_mgr_acquire_res_ife_csid_rdi(
		csid_acquire.sync_mode = CAM_ISP_HW_SYNC_NONE;
		csid_acquire.node_res = NULL;

		/*
		 * Enable RDI pixel drop by default. CSID will enable only for
		 * ver 480 HW to allow userspace to control pixel drop pattern.
		 */
		csid_acquire.drop_enable = true;

		/* Enable RDI crop for single ife use case only */
		if (in_port->usage_type)
			csid_acquire.crop_enable = false;
+2 −0
Original line number Diff line number Diff line
@@ -354,6 +354,8 @@ static struct cam_ife_csid_common_reg_offset
	.plain_fmt_shit_val                           = 10,
	.crop_v_en_shift_val                          = 6,
	.crop_h_en_shift_val                          = 5,
	.drop_v_en_shift_val                          = 4,
	.drop_h_en_shift_val                          = 3,
	.crop_shift                                   = 16,
	.ipp_irq_mask_all                             = 0x7FFF,
	.rdi_irq_mask_all                             = 0x7FFF,
+29 −8
Original line number Diff line number Diff line
@@ -1015,6 +1015,7 @@ static int cam_ife_csid_path_reserve(struct cam_ife_csid_hw *csid_hw,
	path_data->start_line = reserve->in_port->line_start;
	path_data->end_line = reserve->in_port->line_stop;
	path_data->crop_enable = reserve->crop_enable;
	path_data->drop_enable = reserve->drop_enable;

	CAM_DBG(CAM_ISP,
		"Res id: %d height:%d line_start %d line_stop %d crop_en %d",
@@ -1589,10 +1590,6 @@ static int cam_ife_csid_init_config_pxl_path(
		csid_reg->cmn_reg->crop_v_en_shift_val) |
		(1 << 1) | 1;

	val |= (1 << pxl_reg->pix_store_en_shift_val);
	cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
		pxl_reg->csid_pxl_cfg0_addr);

	rc = cam_cpas_get_cpas_hw_version(&camera_hw_version);
	if (rc) {
		CAM_ERR(CAM_ISP, "Failed to get HW version rc:%d", rc);
@@ -1600,6 +1597,16 @@ static int cam_ife_csid_init_config_pxl_path(
	}
	CAM_DBG(CAM_ISP, "HW version: %x", camera_hw_version);

	if (camera_hw_version == CAM_CPAS_TITAN_480_V100)
		val |= (path_data->drop_enable <<
			csid_reg->cmn_reg->drop_h_en_shift_val) |
			(path_data->drop_enable <<
			csid_reg->cmn_reg->drop_v_en_shift_val);

	val |= (1 << pxl_reg->pix_store_en_shift_val);
	cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
		pxl_reg->csid_pxl_cfg0_addr);

	if (path_data->is_valid_vc1_dt1 &&
		camera_hw_version == CAM_CPAS_TITAN_480_V100) {
		val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
@@ -2012,9 +2019,6 @@ static int cam_ife_csid_init_config_rdi_path(
		csid_reg->cmn_reg->crop_v_en_shift_val) |
		(1 << 2) | 3;

	cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
			csid_reg->rdi_reg[id]->csid_rdi_cfg0_addr);

	rc = cam_cpas_get_cpas_hw_version(&camera_hw_version);
	if (rc) {
		CAM_ERR(CAM_ISP, "Failed to get HW version rc:%d", rc);
@@ -2022,6 +2026,15 @@ static int cam_ife_csid_init_config_rdi_path(
	}
	CAM_DBG(CAM_ISP, "HW version: %x", camera_hw_version);

	if (camera_hw_version == CAM_CPAS_TITAN_480_V100)
		val |= (path_data->drop_enable <<
			csid_reg->cmn_reg->drop_h_en_shift_val) |
			(path_data->drop_enable <<
			csid_reg->cmn_reg->drop_v_en_shift_val);

	cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
			csid_reg->rdi_reg[id]->csid_rdi_cfg0_addr);

	if (path_data->is_valid_vc1_dt1 &&
		camera_hw_version == CAM_CPAS_TITAN_480_V100) {
		val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
@@ -2077,8 +2090,16 @@ static int cam_ife_csid_init_config_rdi_path(
	/* set pixel drop pattern to 0 and period to 1 */
	cam_io_w_mb(0, soc_info->reg_map[0].mem_base +
		csid_reg->rdi_reg[id]->csid_rdi_rpp_pix_drop_pattern_addr);

	/* Write max value to pixel drop period due to a bug in ver 480 HW */
	if (camera_hw_version == CAM_CPAS_TITAN_480_V100 &&
		path_data->drop_enable)
		cam_io_w_mb(0x1F, soc_info->reg_map[0].mem_base +
		csid_reg->rdi_reg[id]->csid_rdi_rpp_pix_drop_period_addr);
	else
		cam_io_w_mb(1, soc_info->reg_map[0].mem_base +
		csid_reg->rdi_reg[id]->csid_rdi_rpp_pix_drop_period_addr);

	/* set line drop pattern to 0 and period to 1 */
	cam_io_w_mb(0, soc_info->reg_map[0].mem_base +
		csid_reg->rdi_reg[id]->csid_rdi_rpp_line_drop_pattern_addr);
+4 −0
Original line number Diff line number Diff line
@@ -303,6 +303,8 @@ struct cam_ife_csid_common_reg_offset {
	uint32_t plain_fmt_shit_val;
	uint32_t crop_v_en_shift_val;
	uint32_t crop_h_en_shift_val;
	uint32_t drop_v_en_shift_val;
	uint32_t drop_h_en_shift_val;
	uint32_t crop_shift;
	uint32_t ipp_irq_mask_all;
	uint32_t rdi_irq_mask_all;
@@ -410,6 +412,7 @@ struct cam_ife_csid_cid_data {
 * @out_format:     output format
 * @crop_enable:    crop is enable or disabled, if enabled
 *                  then remaining parameters are valid.
 * @drop_enable:    flag to indicate pixel drop enable or disable
 * @start_pixel:    start pixel
 * @end_pixel:      end_pixel
 * @width:          width
@@ -435,6 +438,7 @@ struct cam_ife_csid_path_cfg {
	uint32_t                        in_format;
	uint32_t                        out_format;
	bool                            crop_enable;
	bool                            drop_enable;
	uint32_t                        start_pixel;
	uint32_t                        end_pixel;
	uint32_t                        width;
+9 −4
Original line number Diff line number Diff line
@@ -5,27 +5,32 @@

#include <linux/module.h>
#include "cam_ife_csid_lite17x.h"
#include "cam_ife_csid_lite480.h"
#include "cam_ife_csid_core.h"
#include "cam_ife_csid_dev.h"

#define CAM_CSID_LITE_DRV_NAME                    "csid_lite"

static struct cam_ife_csid_hw_info cam_ife_csid_lite_hw_info = {
static struct cam_ife_csid_hw_info cam_ife_csid_lite_17x_hw_info = {
	.csid_reg = &cam_ife_csid_lite_17x_reg_offset,
};

static struct cam_ife_csid_hw_info cam_ife_csid_lite_480_hw_info = {
	.csid_reg = &cam_ife_csid_lite_480_reg_offset,
};

static const struct of_device_id cam_ife_csid_lite_dt_match[] = {
	{
		.compatible = "qcom,csid-lite170",
		.data = &cam_ife_csid_lite_hw_info,
		.data = &cam_ife_csid_lite_17x_hw_info,
	},
	{
		.compatible = "qcom,csid-lite175",
		.data = &cam_ife_csid_lite_hw_info,
		.data = &cam_ife_csid_lite_17x_hw_info,
	},
	{
		.compatible = "qcom,csid-lite480",
		.data = &cam_ife_csid_lite_hw_info,
		.data = &cam_ife_csid_lite_480_hw_info,
	},
	{}
};
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