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Commit bfbc3266 authored by Andrew Victor's avatar Andrew Victor Committed by Russell King
Browse files

[ARM] 4754/1: [AT91] SSC library support 



Core support of the Atmel SSC library for all Atmel AT91 processors.

Based on David Brownell's initial patch for the AT91RM9200.

Signed-off-by: default avatarAndrew Victor <linux@maxim.org.za>
Acked-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent c6686ff9

arch/arm/mach-at91/at91rm9200_devices.c

+173 −0
Original line number Diff line number Diff line
@@ -635,6 +635,179 @@ void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} 
#endif





/* --------------------------------------------------------------------

 *  SSC -- Synchronous Serial Controller

 * -------------------------------------------------------------------- */



#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)

static u64 ssc0_dmamask = DMA_BIT_MASK(32);



static struct resource ssc0_resources[] = {

	[0] = {

		.start	= AT91RM9200_BASE_SSC0,

		.end	= AT91RM9200_BASE_SSC0 + SZ_16K - 1,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AT91RM9200_ID_SSC0,

		.end	= AT91RM9200_ID_SSC0,

		.flags	= IORESOURCE_IRQ,

	},

};



static struct platform_device at91rm9200_ssc0_device = {

	.name	= "ssc",

	.id	= 0,

	.dev	= {

		.dma_mask		= &ssc0_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

	},

	.resource	= ssc0_resources,

	.num_resources	= ARRAY_SIZE(ssc0_resources),

};



static inline void configure_ssc0_pins(unsigned pins)

{

	if (pins & ATMEL_SSC_TF)

		at91_set_A_periph(AT91_PIN_PB0, 1);

	if (pins & ATMEL_SSC_TK)

		at91_set_A_periph(AT91_PIN_PB1, 1);

	if (pins & ATMEL_SSC_TD)

		at91_set_A_periph(AT91_PIN_PB2, 1);

	if (pins & ATMEL_SSC_RD)

		at91_set_A_periph(AT91_PIN_PB3, 1);

	if (pins & ATMEL_SSC_RK)

		at91_set_A_periph(AT91_PIN_PB4, 1);

	if (pins & ATMEL_SSC_RF)

		at91_set_A_periph(AT91_PIN_PB5, 1);

}



static u64 ssc1_dmamask = DMA_BIT_MASK(32);



static struct resource ssc1_resources[] = {

	[0] = {

		.start	= AT91RM9200_BASE_SSC1,

		.end	= AT91RM9200_BASE_SSC1 + SZ_16K - 1,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AT91RM9200_ID_SSC1,

		.end	= AT91RM9200_ID_SSC1,

		.flags	= IORESOURCE_IRQ,

	},

};



static struct platform_device at91rm9200_ssc1_device = {

	.name	= "ssc",

	.id	= 1,

	.dev	= {

		.dma_mask		= &ssc1_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

	},

	.resource	= ssc1_resources,

	.num_resources	= ARRAY_SIZE(ssc1_resources),

};



static inline void configure_ssc1_pins(unsigned pins)

{

	if (pins & ATMEL_SSC_TF)

		at91_set_A_periph(AT91_PIN_PB6, 1);

	if (pins & ATMEL_SSC_TK)

		at91_set_A_periph(AT91_PIN_PB7, 1);

	if (pins & ATMEL_SSC_TD)

		at91_set_A_periph(AT91_PIN_PB8, 1);

	if (pins & ATMEL_SSC_RD)

		at91_set_A_periph(AT91_PIN_PB9, 1);

	if (pins & ATMEL_SSC_RK)

		at91_set_A_periph(AT91_PIN_PB10, 1);

	if (pins & ATMEL_SSC_RF)

		at91_set_A_periph(AT91_PIN_PB11, 1);

}



static u64 ssc2_dmamask = DMA_BIT_MASK(32);



static struct resource ssc2_resources[] = {

	[0] = {

		.start	= AT91RM9200_BASE_SSC2,

		.end	= AT91RM9200_BASE_SSC2 + SZ_16K - 1,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AT91RM9200_ID_SSC2,

		.end	= AT91RM9200_ID_SSC2,

		.flags	= IORESOURCE_IRQ,

	},

};



static struct platform_device at91rm9200_ssc2_device = {

	.name	= "ssc",

	.id	= 2,

	.dev	= {

		.dma_mask		= &ssc2_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

	},

	.resource	= ssc2_resources,

	.num_resources	= ARRAY_SIZE(ssc2_resources),

};



static inline void configure_ssc2_pins(unsigned pins)

{

	if (pins & ATMEL_SSC_TF)

		at91_set_A_periph(AT91_PIN_PB12, 1);

	if (pins & ATMEL_SSC_TK)

		at91_set_A_periph(AT91_PIN_PB13, 1);

	if (pins & ATMEL_SSC_TD)

		at91_set_A_periph(AT91_PIN_PB14, 1);

	if (pins & ATMEL_SSC_RD)

		at91_set_A_periph(AT91_PIN_PB15, 1);

	if (pins & ATMEL_SSC_RK)

		at91_set_A_periph(AT91_PIN_PB16, 1);

	if (pins & ATMEL_SSC_RF)

		at91_set_A_periph(AT91_PIN_PB17, 1);

}



/*

 * SSC controllers are accessed through library code, instead of any

 * kind of all-singing/all-dancing driver.  For example one could be

 * used by a particular I2S audio codec's driver, while another one

 * on the same system might be used by a custom data capture driver.

 */

void __init at91_add_device_ssc(unsigned id, unsigned pins)

{

	struct platform_device *pdev;



	/*

	 * NOTE: caller is responsible for passing information matching

	 * "pins" to whatever will be using each particular controller.

	 */

	switch (id) {

	case AT91RM9200_ID_SSC0:

		pdev = &at91rm9200_ssc0_device;

		configure_ssc0_pins(pins);

		at91_clock_associate("ssc0_clk", &pdev->dev, "ssc");

		break;

	case AT91RM9200_ID_SSC1:

		pdev = &at91rm9200_ssc1_device;

		configure_ssc1_pins(pins);

		at91_clock_associate("ssc1_clk", &pdev->dev, "ssc");

		break;

	case AT91RM9200_ID_SSC2:

		pdev = &at91rm9200_ssc2_device;

		configure_ssc2_pins(pins);

		at91_clock_associate("ssc2_clk", &pdev->dev, "ssc");

		break;

	default:

		return;

	}



	platform_device_register(pdev);

}



#else

void __init at91_add_device_ssc(unsigned id, unsigned pins) {}

#endif





/* --------------------------------------------------------------------

 *  UART

 * -------------------------------------------------------------------- */

arch/arm/mach-at91/at91sam9260_devices.c

+79 −0
Original line number Diff line number Diff line
@@ -606,6 +606,85 @@ void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} 
#endif





/* --------------------------------------------------------------------

 *  SSC -- Synchronous Serial Controller

 * -------------------------------------------------------------------- */



#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)

static u64 ssc_dmamask = DMA_BIT_MASK(32);



static struct resource ssc_resources[] = {

	[0] = {

		.start	= AT91SAM9260_BASE_SSC,

		.end	= AT91SAM9260_BASE_SSC + SZ_16K - 1,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AT91SAM9260_ID_SSC,

		.end	= AT91SAM9260_ID_SSC,

		.flags	= IORESOURCE_IRQ,

	},

};



static struct platform_device at91sam9260_ssc_device = {

	.name	= "ssc",

	.id	= 0,

	.dev	= {

		.dma_mask		= &ssc_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

	},

	.resource	= ssc_resources,

	.num_resources	= ARRAY_SIZE(ssc_resources),

};



static inline void configure_ssc_pins(unsigned pins)

{

	if (pins & ATMEL_SSC_TF)

		at91_set_A_periph(AT91_PIN_PB17, 1);

	if (pins & ATMEL_SSC_TK)

		at91_set_A_periph(AT91_PIN_PB16, 1);

	if (pins & ATMEL_SSC_TD)

		at91_set_A_periph(AT91_PIN_PB18, 1);

	if (pins & ATMEL_SSC_RD)

		at91_set_A_periph(AT91_PIN_PB19, 1);

	if (pins & ATMEL_SSC_RK)

		at91_set_A_periph(AT91_PIN_PB20, 1);

	if (pins & ATMEL_SSC_RF)

		at91_set_A_periph(AT91_PIN_PB21, 1);

}



/*

 * SSC controllers are accessed through library code, instead of any

 * kind of all-singing/all-dancing driver.  For example one could be

 * used by a particular I2S audio codec's driver, while another one

 * on the same system might be used by a custom data capture driver.

 */

void __init at91_add_device_ssc(unsigned id, unsigned pins)

{

	struct platform_device *pdev;



	/*

	 * NOTE: caller is responsible for passing information matching

	 * "pins" to whatever will be using each particular controller.

	 */

	switch (id) {

	case AT91SAM9260_ID_SSC:

		pdev = &at91sam9260_ssc_device;

		configure_ssc_pins(pins);

		at91_clock_associate("ssc_clk", &pdev->dev, "pclk");

		break;

	default:

		return;

	}



	platform_device_register(pdev);

}



#else

void __init at91_add_device_ssc(unsigned id, unsigned pins) {}

#endif





/* --------------------------------------------------------------------

 *  UART

 * -------------------------------------------------------------------- */

arch/arm/mach-at91/at91sam9261_devices.c

+173 −0
Original line number Diff line number Diff line
@@ -618,6 +618,179 @@ void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} 
#endif





/* --------------------------------------------------------------------

 *  SSC -- Synchronous Serial Controller

 * -------------------------------------------------------------------- */



#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)

static u64 ssc0_dmamask = DMA_BIT_MASK(32);



static struct resource ssc0_resources[] = {

	[0] = {

		.start	= AT91SAM9261_BASE_SSC0,

		.end	= AT91SAM9261_BASE_SSC0 + SZ_16K - 1,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AT91SAM9261_ID_SSC0,

		.end	= AT91SAM9261_ID_SSC0,

		.flags	= IORESOURCE_IRQ,

	},

};



static struct platform_device at91sam9261_ssc0_device = {

	.name	= "ssc",

	.id	= 0,

	.dev	= {

		.dma_mask		= &ssc0_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

	},

	.resource	= ssc0_resources,

	.num_resources	= ARRAY_SIZE(ssc0_resources),

};



static inline void configure_ssc0_pins(unsigned pins)

{

	if (pins & ATMEL_SSC_TF)

		at91_set_A_periph(AT91_PIN_PB21, 1);

	if (pins & ATMEL_SSC_TK)

		at91_set_A_periph(AT91_PIN_PB22, 1);

	if (pins & ATMEL_SSC_TD)

		at91_set_A_periph(AT91_PIN_PB23, 1);

	if (pins & ATMEL_SSC_RD)

		at91_set_A_periph(AT91_PIN_PB24, 1);

	if (pins & ATMEL_SSC_RK)

		at91_set_A_periph(AT91_PIN_PB25, 1);

	if (pins & ATMEL_SSC_RF)

		at91_set_A_periph(AT91_PIN_PB26, 1);

}



static u64 ssc1_dmamask = DMA_BIT_MASK(32);



static struct resource ssc1_resources[] = {

	[0] = {

		.start	= AT91SAM9261_BASE_SSC1,

		.end	= AT91SAM9261_BASE_SSC1 + SZ_16K - 1,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AT91SAM9261_ID_SSC1,

		.end	= AT91SAM9261_ID_SSC1,

		.flags	= IORESOURCE_IRQ,

	},

};



static struct platform_device at91sam9261_ssc1_device = {

	.name	= "ssc",

	.id	= 1,

	.dev	= {

		.dma_mask		= &ssc1_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

	},

	.resource	= ssc1_resources,

	.num_resources	= ARRAY_SIZE(ssc1_resources),

};



static inline void configure_ssc1_pins(unsigned pins)

{

	if (pins & ATMEL_SSC_TF)

		at91_set_B_periph(AT91_PIN_PA17, 1);

	if (pins & ATMEL_SSC_TK)

		at91_set_B_periph(AT91_PIN_PA18, 1);

	if (pins & ATMEL_SSC_TD)

		at91_set_B_periph(AT91_PIN_PA19, 1);

	if (pins & ATMEL_SSC_RD)

		at91_set_B_periph(AT91_PIN_PA20, 1);

	if (pins & ATMEL_SSC_RK)

		at91_set_B_periph(AT91_PIN_PA21, 1);

	if (pins & ATMEL_SSC_RF)

		at91_set_B_periph(AT91_PIN_PA22, 1);

}



static u64 ssc2_dmamask = DMA_BIT_MASK(32);



static struct resource ssc2_resources[] = {

	[0] = {

		.start	= AT91SAM9261_BASE_SSC2,

		.end	= AT91SAM9261_BASE_SSC2 + SZ_16K - 1,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AT91SAM9261_ID_SSC2,

		.end	= AT91SAM9261_ID_SSC2,

		.flags	= IORESOURCE_IRQ,

	},

};



static struct platform_device at91sam9261_ssc2_device = {

	.name	= "ssc",

	.id	= 2,

	.dev	= {

		.dma_mask		= &ssc2_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

	},

	.resource	= ssc2_resources,

	.num_resources	= ARRAY_SIZE(ssc2_resources),

};



static inline void configure_ssc2_pins(unsigned pins)

{

	if (pins & ATMEL_SSC_TF)

		at91_set_B_periph(AT91_PIN_PC25, 1);

	if (pins & ATMEL_SSC_TK)

		at91_set_B_periph(AT91_PIN_PC26, 1);

	if (pins & ATMEL_SSC_TD)

		at91_set_B_periph(AT91_PIN_PC27, 1);

	if (pins & ATMEL_SSC_RD)

		at91_set_B_periph(AT91_PIN_PC28, 1);

	if (pins & ATMEL_SSC_RK)

		at91_set_B_periph(AT91_PIN_PC29, 1);

	if (pins & ATMEL_SSC_RF)

		at91_set_B_periph(AT91_PIN_PC30, 1);

}



/*

 * SSC controllers are accessed through library code, instead of any

 * kind of all-singing/all-dancing driver.  For example one could be

 * used by a particular I2S audio codec's driver, while another one

 * on the same system might be used by a custom data capture driver.

 */

void __init at91_add_device_ssc(unsigned id, unsigned pins)

{

	struct platform_device *pdev;



	/*

	 * NOTE: caller is responsible for passing information matching

	 * "pins" to whatever will be using each particular controller.

	 */

	switch (id) {

	case AT91SAM9261_ID_SSC0:

		pdev = &at91sam9261_ssc0_device;

		configure_ssc0_pins(pins);

		at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");

		break;

	case AT91SAM9261_ID_SSC1:

		pdev = &at91sam9261_ssc1_device;

		configure_ssc1_pins(pins);

		at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");

		break;

	case AT91SAM9261_ID_SSC2:

		pdev = &at91sam9261_ssc2_device;

		configure_ssc2_pins(pins);

		at91_clock_associate("ssc2_clk", &pdev->dev, "pclk");

		break;

	default:

		return;

	}



	platform_device_register(pdev);

}



#else

void __init at91_add_device_ssc(unsigned id, unsigned pins) {}

#endif





/* --------------------------------------------------------------------

 *  UART

 * -------------------------------------------------------------------- */

arch/arm/mach-at91/at91sam9263_devices.c

+129 −0
Original line number Diff line number Diff line
@@ -865,6 +865,135 @@ void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} 
#endif





/* --------------------------------------------------------------------

 *  SSC -- Synchronous Serial Controller

 * -------------------------------------------------------------------- */



#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)

static u64 ssc0_dmamask = DMA_BIT_MASK(32);



static struct resource ssc0_resources[] = {

	[0] = {

		.start	= AT91SAM9263_BASE_SSC0,

		.end	= AT91SAM9263_BASE_SSC0 + SZ_16K - 1,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AT91SAM9263_ID_SSC0,

		.end	= AT91SAM9263_ID_SSC0,

		.flags	= IORESOURCE_IRQ,

	},

};



static struct platform_device at91sam9263_ssc0_device = {

	.name	= "ssc",

	.id	= 0,

	.dev	= {

		.dma_mask		= &ssc0_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

	},

	.resource	= ssc0_resources,

	.num_resources	= ARRAY_SIZE(ssc0_resources),

};



static inline void configure_ssc0_pins(unsigned pins)

{

	if (pins & ATMEL_SSC_TF)

		at91_set_B_periph(AT91_PIN_PB0, 1);

	if (pins & ATMEL_SSC_TK)

		at91_set_B_periph(AT91_PIN_PB1, 1);

	if (pins & ATMEL_SSC_TD)

		at91_set_B_periph(AT91_PIN_PB2, 1);

	if (pins & ATMEL_SSC_RD)

		at91_set_B_periph(AT91_PIN_PB3, 1);

	if (pins & ATMEL_SSC_RK)

		at91_set_B_periph(AT91_PIN_PB4, 1);

	if (pins & ATMEL_SSC_RF)

		at91_set_B_periph(AT91_PIN_PB5, 1);

}



static u64 ssc1_dmamask = DMA_BIT_MASK(32);



static struct resource ssc1_resources[] = {

	[0] = {

		.start	= AT91SAM9263_BASE_SSC1,

		.end	= AT91SAM9263_BASE_SSC1 + SZ_16K - 1,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AT91SAM9263_ID_SSC1,

		.end	= AT91SAM9263_ID_SSC1,

		.flags	= IORESOURCE_IRQ,

	},

};



static struct platform_device at91sam9263_ssc1_device = {

	.name	= "ssc",

	.id	= 1,

	.dev	= {

		.dma_mask		= &ssc1_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

	},

	.resource	= ssc1_resources,

	.num_resources	= ARRAY_SIZE(ssc1_resources),

};



static inline void configure_ssc1_pins(unsigned pins)

{

	if (pins & ATMEL_SSC_TF)

		at91_set_A_periph(AT91_PIN_PB6, 1);

	if (pins & ATMEL_SSC_TK)

		at91_set_A_periph(AT91_PIN_PB7, 1);

	if (pins & ATMEL_SSC_TD)

		at91_set_A_periph(AT91_PIN_PB8, 1);

	if (pins & ATMEL_SSC_RD)

		at91_set_A_periph(AT91_PIN_PB9, 1);

	if (pins & ATMEL_SSC_RK)

		at91_set_A_periph(AT91_PIN_PB10, 1);

	if (pins & ATMEL_SSC_RF)

		at91_set_A_periph(AT91_PIN_PB11, 1);

}



/*

 * Return the device node so that board init code can use it as the

 * parent for the device node reflecting how it's used on this board.

 *

 * SSC controllers are accessed through library code, instead of any

 * kind of all-singing/all-dancing driver.  For example one could be

 * used by a particular I2S audio codec's driver, while another one

 * on the same system might be used by a custom data capture driver.

 */

void __init at91_add_device_ssc(unsigned id, unsigned pins)

{

	struct platform_device *pdev;



	/*

	 * NOTE: caller is responsible for passing information matching

	 * "pins" to whatever will be using each particular controller.

	 */

	switch (id) {

	case AT91SAM9263_ID_SSC0:

		pdev = &at91sam9263_ssc0_device;

		configure_ssc0_pins(pins);

		at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");

		break;

	case AT91SAM9263_ID_SSC1:

		pdev = &at91sam9263_ssc1_device;

		configure_ssc1_pins(pins);

		at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");

		break;

	default:

		return;

	}



	platform_device_register(pdev);

}



#else

void __init at91_add_device_ssc(unsigned id, unsigned pins) {}

#endif





/* --------------------------------------------------------------------

 *  UART

 * -------------------------------------------------------------------- */

arch/arm/mach-at91/at91sam9rl_devices.c

+129 −0
Original line number Diff line number Diff line
@@ -471,6 +471,135 @@ void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} 
#endif





/* --------------------------------------------------------------------

 *  SSC -- Synchronous Serial Controller

 * -------------------------------------------------------------------- */



#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)

static u64 ssc0_dmamask = DMA_BIT_MASK(32);



static struct resource ssc0_resources[] = {

	[0] = {

		.start	= AT91SAM9RL_BASE_SSC0,

		.end	= AT91SAM9RL_BASE_SSC0 + SZ_16K - 1,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AT91SAM9RL_ID_SSC0,

		.end	= AT91SAM9RL_ID_SSC0,

		.flags	= IORESOURCE_IRQ,

	},

};



static struct platform_device at91sam9rl_ssc0_device = {

	.name	= "ssc",

	.id	= 0,

	.dev	= {

		.dma_mask		= &ssc0_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

	},

	.resource	= ssc0_resources,

	.num_resources	= ARRAY_SIZE(ssc0_resources),

};



static inline void configure_ssc0_pins(unsigned pins)

{

	if (pins & ATMEL_SSC_TF)

		at91_set_A_periph(AT91_PIN_PC0, 1);

	if (pins & ATMEL_SSC_TK)

		at91_set_A_periph(AT91_PIN_PC1, 1);

	if (pins & ATMEL_SSC_TD)

		at91_set_A_periph(AT91_PIN_PA15, 1);

	if (pins & ATMEL_SSC_RD)

		at91_set_A_periph(AT91_PIN_PA16, 1);

	if (pins & ATMEL_SSC_RK)

		at91_set_B_periph(AT91_PIN_PA10, 1);

	if (pins & ATMEL_SSC_RF)

		at91_set_B_periph(AT91_PIN_PA22, 1);

}



static u64 ssc1_dmamask = DMA_BIT_MASK(32);



static struct resource ssc1_resources[] = {

	[0] = {

		.start	= AT91SAM9RL_BASE_SSC1,

		.end	= AT91SAM9RL_BASE_SSC1 + SZ_16K - 1,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AT91SAM9RL_ID_SSC1,

		.end	= AT91SAM9RL_ID_SSC1,

		.flags	= IORESOURCE_IRQ,

	},

};



static struct platform_device at91sam9rl_ssc1_device = {

	.name	= "ssc",

	.id	= 1,

	.dev	= {

		.dma_mask		= &ssc1_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

	},

	.resource	= ssc1_resources,

	.num_resources	= ARRAY_SIZE(ssc1_resources),

};



static inline void configure_ssc1_pins(unsigned pins)

{

	if (pins & ATMEL_SSC_TF)

		at91_set_B_periph(AT91_PIN_PA29, 1);

	if (pins & ATMEL_SSC_TK)

		at91_set_B_periph(AT91_PIN_PA30, 1);

	if (pins & ATMEL_SSC_TD)

		at91_set_B_periph(AT91_PIN_PA13, 1);

	if (pins & ATMEL_SSC_RD)

		at91_set_B_periph(AT91_PIN_PA14, 1);

	if (pins & ATMEL_SSC_RK)

		at91_set_B_periph(AT91_PIN_PA9, 1);

	if (pins & ATMEL_SSC_RF)

		at91_set_B_periph(AT91_PIN_PA8, 1);

}



/*

 * Return the device node so that board init code can use it as the

 * parent for the device node reflecting how it's used on this board.

 *

 * SSC controllers are accessed through library code, instead of any

 * kind of all-singing/all-dancing driver.  For example one could be

 * used by a particular I2S audio codec's driver, while another one

 * on the same system might be used by a custom data capture driver.

 */

void __init at91_add_device_ssc(unsigned id, unsigned pins)

{

	struct platform_device *pdev;



	/*

	 * NOTE: caller is responsible for passing information matching

	 * "pins" to whatever will be using each particular controller.

	 */

	switch (id) {

	case AT91SAM9RL_ID_SSC0:

		pdev = &at91sam9rl_ssc0_device;

		configure_ssc0_pins(pins);

		at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");

		break;

	case AT91SAM9RL_ID_SSC1:

		pdev = &at91sam9rl_ssc1_device;

		configure_ssc1_pins(pins);

		at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");

		break;

	default:

		return;

	}



	platform_device_register(pdev);

}



#else

void __init at91_add_device_ssc(unsigned id, unsigned pins) {}

#endif





/* --------------------------------------------------------------------

 *  UART

 * -------------------------------------------------------------------- */