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Commit be8d8ba8 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add ufs-phy as apps_rsc child device on lito"

parents d405e9f4 b3244234

bindings/ufs/ufs-qcom.txt

+1 −0
Original line number Diff line number Diff line
@@ -48,6 +48,7 @@ Optional properties: 
  (limit link to PWM Gear-1, 1-lane slow mode; disable hibernate, and avoid suspend/resume)

- vccq-parent-supply   : phandle to UFS device's VCCQ parent power supply

- vccq-parent-max-microamp : specifies max. load that can be drawn from the VCCQ's parent supply

- qcom,rpmh-resource-name : Specifies the RPMH resource name



Example:

qcom/lito.dtsi

+17 −18
Original line number Diff line number Diff line
@@ -1809,24 +1809,6 @@ 
		qcom,instance-type = "ufs";

	};



	ufsphy_mem: ufsphy_mem@1d87000 {

		reg = <0x1d87000 0xe00>; /* PHY regs */

		reg-names = "phy_mem";

		#phy-cells = <0>;

		ufs-qcom-crypto = <&ufs_ice>;



		lanes-per-direction = <2>;



		clock-names = "ref_clk_src",

			"ref_clk",

			"ref_aux_clk";

		clocks = <&rpmhcc RPMH_CXO_CLK>,

			<&gcc GCC_UFS_1X_CLKREF_CLK>,

			<&gcc GCC_UFS_PHY_PHY_AUX_CLK>;



		status = "disabled";

	};



	ufshc_mem: ufshc@1d84000 {

		compatible = "qcom,ufshc";

		reg = <0x1d84000 0x3000>;
@@ -2159,6 +2141,23 @@ 
			compatible = "qcom,msm-bus-rsc";

			qcom,msm-bus-id = <MSM_BUS_RSC_APPS>;

		};



		ufsphy_mem: ufsphy_mem@1d87000 {

			reg = <0x1d87000 0xe00>; /* PHY regs */

			reg-names = "phy_mem";

			#phy-cells = <0>;

			ufs-qcom-crypto = <&ufs_ice>;



			lanes-per-direction = <2>;

			qcom,rpmh-resource-name = "qphy.lvl";



			clock-names = "ref_clk_src",

				"ref_clk",

				"ref_aux_clk";

			clocks = <&rpmhcc RPMH_CXO_CLK>,

				<&gcc GCC_UFS_1X_CLKREF_CLK>,

				<&gcc GCC_UFS_PHY_PHY_AUX_CLK>;

		};

	};



	disp_rsc: rsc@af20000 {