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Commit be67d60b authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 fixes from Thomas Gleixner:
 "The last regression fixes for 4.8 final:

   - Two patches addressing the fallout of the CR4 optimizations which
     caused CR4-less machines to fail.

   - Fix the VDSO build on big endian machines

   - Take care of FPU initialization if no CPUID is available otherwise
     task struct size ends up being zero

   - Fix up context tracking in case load_gs_index fails"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/entry/64: Fix context tracking state warning when load_gs_index fails
  x86/boot: Initialize FPU and X86_FEATURE_ALWAYS even if we don't have CPUID
  x86/vdso: Fix building on big endian host
  x86/boot: Fix another __read_cr4() case on 486
  x86/init: Fix cr4_init_shadow() on CR4-less machines
parents 66188fb1 2fa5f04f

arch/x86/entry/entry_64.S

+2 −2
Original line number Diff line number Diff line
@@ -1002,7 +1002,6 @@ ENTRY(error_entry) 
	testb	$3, CS+8(%rsp)

	jz	.Lerror_kernelspace



.Lerror_entry_from_usermode_swapgs:

	/*

	 * We entered from user mode or we're pretending to have entered

	 * from user mode due to an IRET fault.
@@ -1045,7 +1044,8 @@ ENTRY(error_entry) 
	 * gsbase and proceed.  We'll fix up the exception and land in

	 * .Lgs_change's error handler with kernel gsbase.

	 */

	jmp	.Lerror_entry_from_usermode_swapgs

	SWAPGS

	jmp .Lerror_entry_done



.Lbstep_iret:

	/* Fix truncated RIP */

arch/x86/entry/vdso/vdso2c.h

+1 −1
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@ static void BITSFUNC(go)(void *raw_addr, size_t raw_len, 


	ELF(Phdr) *pt = (ELF(Phdr) *)(raw_addr + GET_LE(&hdr->e_phoff));



	if (hdr->e_type != ET_DYN)

	if (GET_LE(&hdr->e_type) != ET_DYN)

		fail("input is not a shared object\n");



	/* Walk the segment table. */

arch/x86/include/asm/tlbflush.h

+1 −1
Original line number Diff line number Diff line
@@ -81,7 +81,7 @@ DECLARE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate); 
/* Initialize cr4 shadow for this CPU. */

static inline void cr4_init_shadow(void)

{

	this_cpu_write(cpu_tlbstate.cr4, __read_cr4());

	this_cpu_write(cpu_tlbstate.cr4, __read_cr4_safe());

}



/* Set in this cpu's CR4. */

arch/x86/kernel/cpu/common.c

+11 −12
Original line number Diff line number Diff line
@@ -804,9 +804,7 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c) 
		identify_cpu_without_cpuid(c);



	/* cyrix could have cpuid enabled via c_identify()*/

	if (!have_cpuid_p())

		return;



	if (have_cpuid_p()) {

		cpu_detect(c);

		get_cpu_vendor(c);

		get_cpu_cap(c);
@@ -819,6 +817,7 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c) 


		if (this_cpu->c_bsp_init)

			this_cpu->c_bsp_init(c);

	}



	setup_force_cpu_cap(X86_FEATURE_ALWAYS);

	fpu__init_system(c);

arch/x86/kernel/setup.c

+1 −3
Original line number Diff line number Diff line
@@ -1137,9 +1137,7 @@ void __init setup_arch(char **cmdline_p) 
	 * auditing all the early-boot CR4 manipulation would be needed to

	 * rule it out.

	 */

	if (boot_cpu_data.cpuid_level >= 0)

		/* A CPU has %cr4 if and only if it has CPUID. */

		mmu_cr4_features = __read_cr4();

	mmu_cr4_features = __read_cr4_safe();



	memblock_set_current_limit(get_max_mapped());