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Commit be518018 authored by Thomas Kleffel's avatar Thomas Kleffel Committed by Pierre Ossman
Browse files

MMC: S3C24XX MMC/SD driver. 



This is the latest S3C MMC/SD driver by Thomas Kleffel
with cleanups as suggested by AKPM done by Ben Dooks.

Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
Signed-off-by: default avatarThomas Kleffel <tk@maintech.de>
Signed-off-by: default avatarPierre Ossman <drzeus@drzeus.cx>
parent 8f1934ce

drivers/mmc/host/Kconfig

+11 −0
Original line number Diff line number Diff line
@@ -143,3 +143,14 @@ config MMC_SPI 


	  If unsure, or if your system has no SPI master driver, say N.



config MMC_S3C

	tristate "Samsung S3C SD/MMC Card Interface support"

	depends on ARCH_S3C2410 && MMC

	help

	  This selects a driver for the MCI interface found in

          Samsung's S3C2410, S3C2412, S3C2440, S3C2442 CPUs.

	  If you have a board based on one of those and a MMC/SD

	  slot, say Y or M here.



	  If unsure, say N.

drivers/mmc/host/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -18,4 +18,4 @@ obj-$(CONFIG_MMC_OMAP) += omap.o 
obj-$(CONFIG_MMC_AT91)		+= at91_mci.o

obj-$(CONFIG_MMC_TIFM_SD)	+= tifm_sd.o

obj-$(CONFIG_MMC_SPI)		+= mmc_spi.o

obj-$(CONFIG_MMC_S3C)   	+= s3cmci.o

drivers/mmc/host/s3cmci.c

0 → 100644
+1343 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/mmc/host/s3cmci.h

0 → 100644
+69 −0
Original line number Diff line number Diff line 
/*

 *  linux/drivers/mmc/s3cmci.h - Samsung S3C MCI driver

 *

 *  Copyright (C) 2004-2006 Thomas Kleffel, All Rights Reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



/* FIXME: DMA Resource management ?! */

#define S3CMCI_DMA 0



enum s3cmci_waitfor {

	COMPLETION_NONE,

	COMPLETION_FINALIZE,

	COMPLETION_CMDSENT,

	COMPLETION_RSPFIN,

	COMPLETION_XFERFINISH,

	COMPLETION_XFERFINISH_RSPFIN,

};



struct s3cmci_host {

	struct platform_device	*pdev;

	struct mmc_host		*mmc;

	struct resource		*mem;

	struct clk		*clk;

	void __iomem		*base;

	int			irq;

	int			irq_cd;

	int			dma;



	unsigned long		clk_rate;

	unsigned long		clk_div;

	unsigned long		real_rate;

	u8			prescaler;



	int			is2440;

	unsigned		sdiimsk;

	unsigned		sdidata;

	int			dodma;

	int			dmatogo;



	struct mmc_request	*mrq;

	int			cmd_is_stop;



	spinlock_t		complete_lock;

	enum s3cmci_waitfor	complete_what;



	int			dma_complete;



	u32			pio_sgptr;

	u32			pio_words;

	u32			pio_count;

	u32			*pio_ptr;

#define XFER_NONE 0

#define XFER_READ 1

#define XFER_WRITE 2

	u32			pio_active;



	int			bus_width;



	char 			dbgmsg_cmd[301];

	char 			dbgmsg_dat[301];

	char			*status;



	unsigned int		ccnt, dcnt;

	struct tasklet_struct	pio_tasklet;

};

include/asm-arm/arch-s3c2410/regs-sdi.h

+17 −3
Original line number Diff line number Diff line
@@ -28,9 +28,15 @@ 
#define S3C2410_SDIDCNT               (0x30)

#define S3C2410_SDIDSTA               (0x34)

#define S3C2410_SDIFSTA               (0x38)



#define S3C2410_SDIDATA               (0x3C)

#define S3C2410_SDIIMSK               (0x40)



#define S3C2440_SDIDATA               (0x40)

#define S3C2440_SDIIMSK               (0x3C)



#define S3C2440_SDICON_SDRESET        (1<<8)

#define S3C2440_SDICON_MMCCLOCK       (1<<5)

#define S3C2410_SDICON_BYTEORDER      (1<<4)

#define S3C2410_SDICON_SDIOIRQ        (1<<3)

#define S3C2410_SDICON_RWAITEN        (1<<2)
@@ -42,7 +48,8 @@ 
#define S3C2410_SDICMDCON_LONGRSP     (1<<10)

#define S3C2410_SDICMDCON_WAITRSP     (1<<9)

#define S3C2410_SDICMDCON_CMDSTART    (1<<8)

#define S3C2410_SDICMDCON_INDEX       (0xff)

#define S3C2410_SDICMDCON_SENDERHOST  (1<<6)

#define S3C2410_SDICMDCON_INDEX       (0x3f)



#define S3C2410_SDICMDSTAT_CRCFAIL    (1<<12)

#define S3C2410_SDICMDSTAT_CMDSENT    (1<<11)
@@ -51,6 +58,9 @@ 
#define S3C2410_SDICMDSTAT_XFERING    (1<<8)

#define S3C2410_SDICMDSTAT_INDEX      (0xff)



#define S3C2440_SDIDCON_DS_BYTE       (0<<22)

#define S3C2440_SDIDCON_DS_HALFWORD   (1<<22)

#define S3C2440_SDIDCON_DS_WORD       (2<<22)

#define S3C2410_SDIDCON_IRQPERIOD     (1<<21)

#define S3C2410_SDIDCON_TXAFTERRESP   (1<<20)

#define S3C2410_SDIDCON_RXAFTERCMD    (1<<19)
@@ -59,6 +69,7 @@ 
#define S3C2410_SDIDCON_WIDEBUS       (1<<16)

#define S3C2410_SDIDCON_DMAEN         (1<<15)

#define S3C2410_SDIDCON_STOP          (1<<14)

#define S3C2440_SDIDCON_DATSTART      (1<<14)

#define S3C2410_SDIDCON_DATMODE	      (3<<12)

#define S3C2410_SDIDCON_BLKNUM        (0x7ff)
@@ -68,6 +79,7 @@ 
#define S3C2410_SDIDCON_XFER_RXSTART  (2<<12)

#define S3C2410_SDIDCON_XFER_TXSTART  (3<<12)



#define S3C2410_SDIDCON_BLKNUM_MASK   (0xFFF)

#define S3C2410_SDIDCNT_BLKNUM_SHIFT  (12)



#define S3C2410_SDIDSTA_RDYWAITREQ    (1<<10)
@@ -82,10 +94,12 @@ 
#define S3C2410_SDIDSTA_TXDATAON      (1<<1)

#define S3C2410_SDIDSTA_RXDATAON      (1<<0)



#define S3C2440_SDIFSTA_FIFORESET      (1<<16)

#define S3C2440_SDIFSTA_FIFOFAIL       (3<<14)  /* 3 is correct (2 bits) */

#define S3C2410_SDIFSTA_TFDET          (1<<13)

#define S3C2410_SDIFSTA_RFDET          (1<<12)

#define S3C2410_SDIFSTA_TXHALF         (1<<11)

#define S3C2410_SDIFSTA_TXEMPTY        (1<<10)

#define S3C2410_SDIFSTA_TFHALF         (1<<11)

#define S3C2410_SDIFSTA_TFEMPTY        (1<<10)

#define S3C2410_SDIFSTA_RFLAST         (1<<9)

#define S3C2410_SDIFSTA_RFFULL         (1<<8)

#define S3C2410_SDIFSTA_RFHALF         (1<<7)