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Commit be0bcec4 authored by Sean Christopherson's avatar Sean Christopherson Committed by Greg Kroah-Hartman
Browse files

KVM: x86/mmu: Set mmio_value to '0' if reserved #PF can't be generated 



[ Upstream commit 6129ed877d409037b79866327102c9dc59a302fe ]

Set the mmio_value to '0' instead of simply clearing the present bit to
squash a benign warning in kvm_mmu_set_mmio_spte_mask() that complains
about the mmio_value overlapping the lower GFN mask on systems with 52
bits of PA space.

Opportunistically clean up the code and comments.

Cc: stable@vger.kernel.org
Fixes: d43e2675e96fc ("KVM: x86: only do L1TF workaround on affected processors")
Signed-off-by: default avatarSean Christopherson <sean.j.christopherson@intel.com>
Message-Id: <20200527084909.23492-1-sean.j.christopherson@intel.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 940ed58a

arch/x86/kvm/mmu.c

+9 −18
Original line number Diff line number Diff line
@@ -6077,25 +6077,16 @@ static void kvm_set_mmio_spte_mask(void) 
	u64 mask;



	/*

	 * Set the reserved bits and the present bit of an paging-structure

	 * entry to generate page fault with PFER.RSV = 1.

	 */



	/*

	 * Mask the uppermost physical address bit, which would be reserved as

	 * long as the supported physical address width is less than 52.

	 */

	mask = 1ull << 51;



	/* Set the present bit. */

	mask |= 1ull;



	/*

	 * If reserved bit is not supported, clear the present bit to disable

	 * mmio page fault.

	 */

	if (shadow_phys_bits == 52)

		mask &= ~1ull;

	 * Set a reserved PA bit in MMIO SPTEs to generate page faults with

	 * PFEC.RSVD=1 on MMIO accesses.  64-bit PTEs (PAE, x86-64, and EPT

	 * paging) support a maximum of 52 bits of PA, i.e. if the CPU supports

	 * 52-bit physical addresses then there are no reserved PA bits in the

	 * PTEs and so the reserved PA approach must be disabled.

	 */

	if (shadow_phys_bits < 52)

		mask = BIT_ULL(51) | PT_PRESENT_MASK;

	else

		mask = 0;



	kvm_mmu_set_mmio_spte_mask(mask, mask);

}