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Commit bdf21b18 authored by Pete Popov's avatar Pete Popov Committed by Ralf Baechle
Browse files

Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it. 



Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent e01402b1

arch/mips/Kconfig

+21 −0
Original line number Original line Diff line number Diff line
@@ -489,6 +489,16 @@ config HYPERTRANSPORT 
	bool "Hypertransport Support for PMC-Sierra Yosemite"

	bool "Hypertransport Support for PMC-Sierra Yosemite"

	depends on PMC_YOSEMITE

	depends on PMC_YOSEMITE





config PNX8550_V2PCI

	bool "Support for Philips PNX8550 based Viper2-PCI board"

	select PNX8550

	select SYS_SUPPORTS_LITTLE_ENDIAN



config PNX8550_JBS

	bool "Support for Philips PNX8550 based JBS board"

	select PNX8550

	select SYS_SUPPORTS_LITTLE_ENDIAN



config DDB5074

config DDB5074

	bool "Support for NEC DDB Vrc-5074 (EXPERIMENTAL)"

	bool "Support for NEC DDB Vrc-5074 (EXPERIMENTAL)"

	depends on EXPERIMENTAL

	depends on EXPERIMENTAL
@@ -827,6 +837,7 @@ config TOSHIBA_FPCIB0 




source "arch/mips/sgi-ip27/Kconfig"

source "arch/mips/sgi-ip27/Kconfig"

source "arch/mips/sibyte/Kconfig"

source "arch/mips/sibyte/Kconfig"

source "arch/mips/philips/pnx8550/common/Kconfig"





config RWSEM_GENERIC_SPINLOCK

config RWSEM_GENERIC_SPINLOCK

	bool

	bool
@@ -954,6 +965,16 @@ config ITE_BOARD_GEN 
	depends on MIPS_IVR || MIPS_ITE8172

	depends on MIPS_IVR || MIPS_ITE8172

	default y

	default y





config PNX8550

	bool

	select SOC_PNX8550



config SOC_PNX8550

	bool

	select SYS_SUPPORTS_32BIT_KERNEL

	select DMA_NONCOHERENT

	select HW_HAS_PCI



config SWAP_IO_SPACE

config SWAP_IO_SPACE

	bool

	bool

arch/mips/Makefile

+14 −0
Original line number Original line Diff line number Diff line
@@ -228,6 +228,7 @@ cflags-$(CONFIG_CPU_RM9000) += \ 
			$(call set_gccflags,rm9000,mips4,r5000,mips4,mips2) \

			$(call set_gccflags,rm9000,mips4,r5000,mips4,mips2) \

			-Wa,--trap

			-Wa,--trap







cflags-$(CONFIG_CPU_SB1)	+= \

cflags-$(CONFIG_CPU_SB1)	+= \

			$(call set_gccflags,sb1,mips64,r5000,mips4,mips2) \

			$(call set_gccflags,sb1,mips64,r5000,mips4,mips2) \

			-Wa,--trap

			-Wa,--trap
@@ -560,6 +561,19 @@ load-$(CONFIG_CASIO_E55) += 0xffffffff80004000 
#

#

load-$(CONFIG_TANBAC_TB022X)	+= 0xffffffff80000000

load-$(CONFIG_TANBAC_TB022X)	+= 0xffffffff80000000





#

# Common Philips PNX8550

#

core-$(CONFIG_SOC_PNX8550)	+= arch/mips/philips/pnx8550/common/

cflags-$(CONFIG_SOC_PNX8550)	+= -Iinclude/asm-mips/mach-pnx8550



#

# Philips PNX8550 JBS board

#

libs-$(CONFIG_PNX8550_JBS)	+= arch/mips/philips/pnx8550/jbs/

#cflags-$(CONFIG_PNX8550_JBS)	+= -Iinclude/asm-mips/mach-pnx8550

load-$(CONFIG_PNX8550_JBS)	+= 0xffffffff80060000



#

#

# SGI IP22 (Indy/Indigo2)

# SGI IP22 (Indy/Indigo2)

#

#

arch/mips/kernel/cpu-probe.c

+19 −0
Original line number Original line Diff line number Diff line
@@ -121,6 +121,7 @@ static inline void check_wait(void) 
	case CPU_24K:

	case CPU_24K:

	case CPU_25KF:

	case CPU_25KF:

	case CPU_34K:

	case CPU_34K:

 	case CPU_PR4450:

		cpu_wait = r4k_wait;

		cpu_wait = r4k_wait;

		printk(" available.\n");

		printk(" available.\n");

		break;

		break;
@@ -624,6 +625,21 @@ static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c) 
	}

	}

}

}





static inline void cpu_probe_philips(struct cpuinfo_mips *c)

{

	decode_configs(c);

	switch (c->processor_id & 0xff00) {

	case PRID_IMP_PR4450:

		c->cputype = CPU_PR4450;

		c->isa_level = MIPS_CPU_ISA_M32;

		break;

	default:

		panic("Unknown Philips Core!"); /* REVISIT: die? */

		break;

	}

}





__init void cpu_probe(void)

__init void cpu_probe(void)

{

{

	struct cpuinfo_mips *c = &current_cpu_data;

	struct cpuinfo_mips *c = &current_cpu_data;
@@ -649,6 +665,9 @@ __init void cpu_probe(void) 
	case PRID_COMP_SANDCRAFT:

	case PRID_COMP_SANDCRAFT:

		cpu_probe_sandcraft(c);

		cpu_probe_sandcraft(c);

		break;

		break;

 	case PRID_COMP_PHILIPS:

		cpu_probe_philips(c);

 		break;

	default:

	default:

		c->cputype = CPU_UNKNOWN;

		c->cputype = CPU_UNKNOWN;

	}

	}

arch/mips/kernel/proc.c

+2 −1
Original line number Original line Diff line number Diff line
@@ -80,7 +80,8 @@ static const char *cpu_name[] = { 
	[CPU_VR4133]	= "NEC VR4133",

	[CPU_VR4133]	= "NEC VR4133",

	[CPU_VR4181]	= "NEC VR4181",

	[CPU_VR4181]	= "NEC VR4181",

	[CPU_VR4181A]	= "NEC VR4181A",

	[CPU_VR4181A]	= "NEC VR4181A",

	[CPU_SR71000]	= "Sandcraft SR71000"

	[CPU_SR71000]	= "Sandcraft SR71000",

	[CPU_PR4450]	= "Philips PR4450",

};

};

arch/mips/kernel/time.c

+3 −0
Original line number Original line Diff line number Diff line
@@ -11,6 +11,7 @@ 
 * Free Software Foundation;  either version 2 of the  License, or (at your

 * Free Software Foundation;  either version 2 of the  License, or (at your

 * option) any later version.

 * option) any later version.

 */

 */

#include <linux/config.h>

#include <linux/types.h>

#include <linux/types.h>

#include <linux/kernel.h>

#include <linux/kernel.h>

#include <linux/init.h>

#include <linux/init.h>
@@ -112,8 +113,10 @@ static void c0_timer_ack(void) 
{

{

	unsigned int count;

	unsigned int count;





#ifndef CONFIG_SOC_PNX8550	/* pnx8550 resets to zero */

	/* Ack this timer interrupt and set the next one.  */

	/* Ack this timer interrupt and set the next one.  */

	expirelo += cycles_per_jiffy;

	expirelo += cycles_per_jiffy;

#endif

	write_c0_compare(expirelo);

	write_c0_compare(expirelo);





	/* Check to see if we have missed any timer interrupts.  */

	/* Check to see if we have missed any timer interrupts.  */