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Commit bd79b3b9 authored by Srinivas Kandagatla's avatar Srinivas Kandagatla Committed by Greg Kroah-Hartman
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ASoC: msm8916-wcd-analog: fix register Interrupt offset



[ Upstream commit ff69c97ef84c9f7795adb49e9f07c9adcdd0c288 ]

For some reason interrupt set and clear register offsets are
not set correctly.
This patch corrects them!

Fixes: 585e881e ("ASoC: codecs: Add msm8916-wcd analog codec")
Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: default avatarStephan Gerhold <stephan@gerhold.net>
Reviewed-by: default avatarStephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200811103452.20448-1-srinivas.kandagatla@linaro.org


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent c5599b90
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@@ -16,8 +16,8 @@

#define CDC_D_REVISION1			(0xf000)
#define CDC_D_PERPH_SUBTYPE		(0xf005)
#define CDC_D_INT_EN_SET		(0x015)
#define CDC_D_INT_EN_CLR		(0x016)
#define CDC_D_INT_EN_SET		(0xf015)
#define CDC_D_INT_EN_CLR		(0xf016)
#define MBHC_SWITCH_INT			BIT(7)
#define MBHC_MIC_ELECTRICAL_INS_REM_DET	BIT(6)
#define MBHC_BUTTON_PRESS_DET		BIT(5)