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Commit bc9ef770 authored by Richard Zhu's avatar Richard Zhu Committed by Bjorn Helgaas
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PCI: imx6: Fix bugs in PCIe startup code 



LTSSM shouldn't be set once in assert_core_reset().  Move peripheral reset
just before LTSSM start.

Signed-off-by: default avatarRichard Zhu <r65037@freescale.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Acked-by: default avatarShawn Guo <shawn.guo@linaro.org>
Cc: Frank Li <lznuaa@gmail.com>
Cc: Harro Haan <hrhaan@gmail.com>
Cc: Jingoo Han <jg1.han@samsung.com>
Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
Cc: Pratyush Anand <pratyush.anand@st.com>
Cc: Richard Zhu <r65037@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Siva Reddy Kallam <siva.kallam@samsung.com>
Cc: Srikanth T Shivanand <ts.srikanth@samsung.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Yinghai Lu <yinghai@kernel.org>
parent fa33a6d8

drivers/pci/host/pci-imx6.c

+6 −9
Original line number Diff line number Diff line
@@ -220,18 +220,9 @@ static int imx6_pcie_assert_core_reset(struct pcie_port *pp) 


	regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,

			IMX6Q_GPR1_PCIE_TEST_PD, 1 << 18);

	regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,

			IMX6Q_GPR12_PCIE_CTL_2, 1 << 10);

	regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,

			IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16);



	/* Some boards don't have PCIe reset GPIO. */

	if (gpio_is_valid(imx6_pcie->reset_gpio)) {

		gpio_set_value(imx6_pcie->reset_gpio, 0);

		msleep(100);

		gpio_set_value(imx6_pcie->reset_gpio, 1);

	}



	return 0;

}
@@ -275,6 +266,12 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp) 
	/* allow the clocks to stabilize */

	usleep_range(200, 500);



	/* Some boards don't have PCIe reset GPIO. */

	if (gpio_is_valid(imx6_pcie->reset_gpio)) {

		gpio_set_value(imx6_pcie->reset_gpio, 0);

		msleep(100);

		gpio_set_value(imx6_pcie->reset_gpio, 1);

	}

	return 0;



err_pcie_axi: