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Commit bc97e88e authored by Philipp Zabel's avatar Philipp Zabel Committed by Shawn Guo
Browse files

ARM: dts: imx6qdl: add multiplexer controls 



The IOMUXC General Purpose Register space contains various bitfields
that control video bus multiplexers. Describe them using a mmio-mux
node. The placement of the IPU CSI video mux controls differs between
i.MX6D/Q and i.MX6S/DL.

Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent cc20028f

arch/arm/boot/dts/imx6dl.dtsi

+10 −0
Original line number Diff line number Diff line
@@ -181,6 +181,16 @@ 
		      "di0", "di1";

};



&mux {

	mux-reg-masks = <0x34 0x00000007>, /* IPU_CSI0_MUX */

			<0x34 0x00000038>, /* IPU_CSI1_MUX */

			<0x0c 0x0000000c>, /* HDMI_MUX_CTL */

			<0x0c 0x000000c0>, /* LVDS0_MUX_CTL */

			<0x0c 0x00000300>, /* LVDS1_MUX_CTL */

			<0x28 0x00000003>, /* DCIC1_MUX_CTL */

			<0x28 0x0000000c>; /* DCIC2_MUX_CTL */

};



&vpu {

	compatible = "fsl,imx6dl-vpu", "cnm,coda960";

};

arch/arm/boot/dts/imx6q.dtsi

+10 −0
Original line number Diff line number Diff line
@@ -332,6 +332,16 @@ 
	};

};



&mux {

	mux-reg-masks = <0x04 0x00080000>, /* MIPI_IPU1_MUX */

			<0x04 0x00100000>, /* MIPI_IPU2_MUX */

			<0x0c 0x0000000c>, /* HDMI_MUX_CTL */

			<0x0c 0x000000c0>, /* LVDS0_MUX_CTL */

			<0x0c 0x00000300>, /* LVDS1_MUX_CTL */

			<0x28 0x00000003>, /* DCIC1_MUX_CTL */

			<0x28 0x0000000c>; /* DCIC2_MUX_CTL */

};



&vpu {

	compatible = "fsl,imx6q-vpu", "cnm,coda960";

};

arch/arm/boot/dts/imx6qdl.dtsi

+6 −1
Original line number Diff line number Diff line
@@ -826,8 +826,13 @@ 
			};



			gpr: iomuxc-gpr@020e0000 {

				compatible = "fsl,imx6q-iomuxc-gpr", "syscon";

				compatible = "fsl,imx6q-iomuxc-gpr", "syscon", "simple-mfd";

				reg = <0x020e0000 0x38>;



				mux: mux-controller {

					compatible = "mmio-mux";

					#mux-control-cells = <1>;

				};

			};



			iomuxc: iomuxc@020e0000 {