Merge "ARM: dts: msm: Add adsp pil node for Lagoon"

				  "l3-scu-faultirq";

	};

	qcom,lpass@3000000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0x03000000 0x00100>;

		vdd_lpi_cx-supply = <&L1A_LEVEL>;

		qcom,vdd_lpi_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;

		vdd_lpi_mx-supply = <&L17A_LEVEL>;

		qcom,vdd_lpi_mx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;

		qcom,proxy-reg-names = "vdd_lpi_cx", "vdd_lpi_mx";

		clocks = <&rpmhcc RPMH_CXO_CLK>;

		clock-names = "xo";

		qcom,proxy-clock-names = "xo";

		qcom,pas-id = <1>;

		qcom,proxy-timeout-ms = <10000>;

		qcom,smem-id = <423>;

		qcom,minidump-id = <5>;

		qcom,sysmon-id = <1>;

		qcom,ssctl-instance-id = <0x14>;

		qcom,firmware-name = "adsp";

		memory-region = <&pil_adsp_mem>;

		qcom,signal-aop;

		qcom,complete-ramdump;

		qcom,minidump-as-elf32;

		/* Inputs from lpass */

		interrupts-extended = <&pdc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,

				      <&adsp_smp2p_in 0 0>,

				      <&adsp_smp2p_in 1 0>,

				      <&adsp_smp2p_in 2 0>,

				      <&adsp_smp2p_in 3 0>;

		interrupt-names = "qcom,wdog",

				  "qcom,err-fatal",

				  "qcom,err-ready",

				  "qcom,proxy-unvote",

				  "qcom,stop-ack";

		/* Outputs to lpass */

		qcom,smem-states = <&adsp_smp2p_out 0>;

		qcom,smem-state-names = "qcom,force-stop";

		mboxes = <&qmp_aop 0>;

		mbox-names = "adsp-pil";

	};

	cpuss_dump {

		compatible = "qcom,cpuss-dump";