Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Skip to content
Commit bc7b34a2 authored by Peter De Schrijver's avatar Peter De Schrijver Committed by Stephen Boyd
Browse files

clk: tegra: Init cfg structure in _get_pll_mnp



Not all fields are read from the hw depending on the PLL type. Make sure
the other fields are 0 by clearing the structure beforehand to prevent
users such as the rate re-calculation code from using bogus values.

Based on work by  Alex Frid <afrid@nvidia.com>

Signed-off-by: default avatarPeter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: default avatarThierry Reding <treding@nvidia.com>
Acked-by: default avatarThierry Reding <treding@nvidia.com>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent e34e69cc
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment