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Commit bbad2da8 authored by Harry Wentland's avatar Harry Wentland Committed by Alex Deucher
Browse files

drm/amd/display: Re-use DCE100 display_power_gating for DCE80 



Both functions are the same

Signed-off-by: default avatarHarry Wentland <harry.wentland@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 92e2239e

drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c

+1 −1
Original line number Diff line number Diff line
@@ -69,7 +69,7 @@ static const struct dce100_hw_seq_reg_offsets reg_offsets[] = { 
 ******************************************************************************/

/***************************PIPE_CONTROL***********************************/



static bool dce100_enable_display_power_gating(

bool dce100_enable_display_power_gating(

	struct dc *dc,

	uint8_t controller_id,

	struct dc_bios *dcb,

drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h

+4 −0
Original line number Diff line number Diff line
@@ -38,5 +38,9 @@ void dce100_set_bandwidth( 
		struct dc_state *context,

		bool decrease_allowed);



bool dce100_enable_display_power_gating(struct dc *dc, uint8_t controller_id,

					struct dc_bios *dcb,

					enum pipe_gating_control power_gating);



#endif /* __DC_HWSS_DCE100_H__ */

drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c

+1 −37
Original line number Diff line number Diff line
@@ -70,47 +70,11 @@ static const struct dce80_hw_seq_reg_offsets reg_offsets[] = { 


/***************************PIPE_CONTROL***********************************/



static bool dce80_enable_display_power_gating(

	struct dc *dc,

	uint8_t controller_id,

	struct dc_bios *dcb,

	enum pipe_gating_control power_gating)

{

	enum bp_result bp_result = BP_RESULT_OK;

	enum bp_pipe_control_action cntl;

	struct dc_context *ctx = dc->ctx;



	if (power_gating == PIPE_GATING_CONTROL_INIT)

		cntl = ASIC_PIPE_INIT;

	else if (power_gating == PIPE_GATING_CONTROL_ENABLE)

		cntl = ASIC_PIPE_ENABLE;

	else

		cntl = ASIC_PIPE_DISABLE;



	if (!(power_gating == PIPE_GATING_CONTROL_INIT && controller_id != 0)){



		bp_result = dcb->funcs->enable_disp_power_gating(

						dcb, controller_id + 1, cntl);



		/* Revert MASTER_UPDATE_MODE to 0 because bios sets it 2

		 * by default when command table is called

		 */

		dm_write_reg(ctx,

			HW_REG_CRTC(mmMASTER_UPDATE_MODE, controller_id),

			0);

	}



	if (bp_result == BP_RESULT_OK)

		return true;

	else

		return false;

}



void dce80_hw_sequencer_construct(struct dc *dc)

{

	dce110_hw_sequencer_construct(dc);



	dc->hwss.enable_display_power_gating = dce80_enable_display_power_gating;

	dc->hwss.enable_display_power_gating = dce100_enable_display_power_gating;

	dc->hwss.pipe_control_lock = dce_pipe_control_lock;

	dc->hwss.set_bandwidth = dce100_set_bandwidth;

}