Loading drivers/hwtracing/coresight/coresight-etm-perf.c +5 −4 Original line number Diff line number Diff line Loading @@ -220,6 +220,8 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, return NULL; INIT_WORK(&event_data->work, free_event_data); mask = &event_data->mask; /* First get the selected sink from user space. */ if (event->attr.config2) { id = (u32)event->attr.config2; Loading @@ -228,11 +230,10 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, sink = coresight_get_enabled_sink(true); } if (!sink) if (!sink) { cpumask_clear(mask); goto err; mask = &event_data->mask; } /* * Setup the path for each CPU in a trace session. We try to build * trace path for each CPU in the mask. If we don't find an ETM Loading Loading
drivers/hwtracing/coresight/coresight-etm-perf.c +5 −4 Original line number Diff line number Diff line Loading @@ -220,6 +220,8 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, return NULL; INIT_WORK(&event_data->work, free_event_data); mask = &event_data->mask; /* First get the selected sink from user space. */ if (event->attr.config2) { id = (u32)event->attr.config2; Loading @@ -228,11 +230,10 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, sink = coresight_get_enabled_sink(true); } if (!sink) if (!sink) { cpumask_clear(mask); goto err; mask = &event_data->mask; } /* * Setup the path for each CPU in a trace session. We try to build * trace path for each CPU in the mask. If we don't find an ETM Loading